#include <kern/thread.h>
#include <kern/thread_act.h>
#include <kern/misc_protos.h>
#include <mach/ppc/thread_status.h>
#include <ppc/proc_reg.h>
#include <ppc/exception.h>
#include <ppc/fpu_protos.h>
#include <ppc/misc_protos.h>
#include <ppc/savearea.h>
#include <ppc/thread_act.h>
#include <ppc/Firmware.h>
#include <vm/vm_map.h>
extern unsigned int killprint;
extern double FloatInit;
extern unsigned long QNaNbarbarian[4];
extern void thread_bootstrap_return(void);
extern struct Saveanchor saveanchor;
extern int real_ncpus;
struct ppc_saved_state * get_user_regs(thread_act_t);
#define USRSTACK 0xc0000000
kern_return_t
thread_userstack(
thread_t,
int,
thread_state_t,
unsigned int,
vm_offset_t *,
int *
);
kern_return_t
thread_entrypoint(
thread_t,
int,
thread_state_t,
unsigned int,
vm_offset_t *
);
unsigned int get_msr_exportmask(void);
unsigned int get_msr_nbits(void);
unsigned int get_msr_rbits(void);
void thread_set_child(thread_act_t child, int pid);
void thread_set_parent(thread_act_t parent, int pid);
unsigned int state_count[] = {
0,
PPC_THREAD_STATE_COUNT,
PPC_FLOAT_STATE_COUNT,
PPC_EXCEPTION_STATE_COUNT,
};
kern_return_t
act_machine_get_state(
thread_act_t thr_act,
thread_flavor_t flavor,
thread_state_t tstate,
mach_msg_type_number_t *count)
{
register struct savearea *sv;
int i, j;
unsigned int vrvalidwrk;
register struct ppc_thread_state *ts;
register struct ppc_exception_state *es;
register struct ppc_float_state *fs;
register struct ppc_vector_state *vs;
#if MACH_ASSERT
if (watchacts & WA_STATE)
printf("act_%x act_machine_get_state(thr_act=%x,flav=%x,st=%x,cnt@%x=%x)\n",
current_act(), thr_act, flavor, tstate,
count, (count ? *count : 0));
#endif
switch (flavor) {
case THREAD_STATE_FLAVOR_LIST:
if (*count < 3) {
return (KERN_INVALID_ARGUMENT);
}
tstate[0] = PPC_THREAD_STATE;
tstate[1] = PPC_FLOAT_STATE;
tstate[2] = PPC_EXCEPTION_STATE;
*count = 3;
return KERN_SUCCESS;
case PPC_THREAD_STATE:
if (*count < PPC_THREAD_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
ts = (struct ppc_thread_state *) tstate;
sv = (savearea *)(thr_act->mact.pcb);
while(sv) {
if(sv->save_srr1 & MASK(MSR_PR)) {
break;
}
sv = sv->save_prev;
}
if(sv) {
ts->r0 = sv->save_r0;
ts->r1 = sv->save_r1;
ts->r2 = sv->save_r2;
ts->r3 = sv->save_r3;
ts->r4 = sv->save_r4;
ts->r5 = sv->save_r5;
ts->r6 = sv->save_r6;
ts->r7 = sv->save_r7;
ts->r8 = sv->save_r8;
ts->r9 = sv->save_r9;
ts->r10 = sv->save_r10;
ts->r11 = sv->save_r11;
ts->r12 = sv->save_r12;
ts->r13 = sv->save_r13;
ts->r14 = sv->save_r14;
ts->r15 = sv->save_r15;
ts->r16 = sv->save_r16;
ts->r17 = sv->save_r17;
ts->r18 = sv->save_r18;
ts->r19 = sv->save_r19;
ts->r20 = sv->save_r20;
ts->r21 = sv->save_r21;
ts->r22 = sv->save_r22;
ts->r23 = sv->save_r23;
ts->r24 = sv->save_r24;
ts->r25 = sv->save_r25;
ts->r26 = sv->save_r26;
ts->r27 = sv->save_r27;
ts->r28 = sv->save_r28;
ts->r29 = sv->save_r29;
ts->r30 = sv->save_r30;
ts->r31 = sv->save_r31;
ts->cr = sv->save_cr;
ts->xer = sv->save_xer;
ts->lr = sv->save_lr;
ts->ctr = sv->save_ctr;
ts->srr0 = sv->save_srr0;
ts->srr1 = sv->save_srr1;
ts->mq = sv->save_mq;
ts->vrsave = sv->save_vrsave;
}
else {
for(i=0; i < 32; i+=2) {
((unsigned int *)&ts->r0)[i] = ((unsigned int *)&FloatInit)[0];
((unsigned int *)&ts->r0)[i+1] = ((unsigned int *)&FloatInit)[1];
}
ts->cr = 0;
ts->xer = 0;
ts->lr = ((unsigned int *)&FloatInit)[0];
ts->ctr = ((unsigned int *)&FloatInit)[1];
ts->srr0 = ((unsigned int *)&FloatInit)[0];
ts->srr1 = MSR_EXPORT_MASK_SET;
ts->mq = 0;
ts->vrsave = 0;
}
*count = PPC_THREAD_STATE_COUNT;
return KERN_SUCCESS;
case PPC_EXCEPTION_STATE:
if (*count < PPC_EXCEPTION_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
es = (struct ppc_exception_state *) tstate;
sv = (savearea *)(thr_act->mact.pcb);
while(sv) {
if(sv->save_srr1 & MASK(MSR_PR)) {
break;
}
sv = sv->save_prev;
}
if(sv) {
es->dar = sv->save_dar;
es->dsisr = sv->save_dsisr;
es->exception = sv->save_exception;
}
else {
es->dar = 0;
es->dsisr = 0;
es->exception = ((unsigned int *)&FloatInit)[0];
}
*count = PPC_EXCEPTION_STATE_COUNT;
return KERN_SUCCESS;
case PPC_FLOAT_STATE:
if (*count < PPC_FLOAT_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
fpu_save(thr_act);
fs = (struct ppc_float_state *) tstate;
sv = (savearea *)(thr_act->mact.FPU_pcb);
while(sv) {
if(!sv->save_level_fp) {
break;
}
sv = sv->save_prev_float;
}
if(sv) {
bcopy((char *)&sv->save_fp0, (char *)fs, 33*8);
}
else {
for(i=0; i < 32; i++) {
fs->fpregs[i] = FloatInit;
}
fs->fpscr_pad = 0;
fs->fpscr = 0;
}
*count = PPC_FLOAT_STATE_COUNT;
return KERN_SUCCESS;
case PPC_VECTOR_STATE:
if (*count < PPC_VECTOR_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
vec_save(thr_act);
vs = (struct ppc_vector_state *) tstate;
sv = (savearea *)(thr_act->mact.VMX_pcb);
while(sv) {
if(!sv->save_level_vec) {
break;
}
sv = sv->save_prev_vector;
}
if(sv) {
vrvalidwrk = sv->save_vrvalid;
vs->save_vrvalid = sv->save_vrvalid;
for(j=0; j < 4; j++) vs->save_vscr[j] = sv->save_vscr[j];
for(i=0; i < 32; i++) {
for(j=0; j < 4; j++) {
if(vrvalidwrk & 0x80000000) (vs->save_vr)[i][j] =
((unsigned int *)&(sv->save_vr0))[(i * 4) + j];
else vs->save_vr[i][j] = QNaNbarbarian[j];
}
vrvalidwrk = vrvalidwrk << 1;
}
}
else {
for(i=0; i < 32; i++) {
for(j=0; j < 4; j++) vs->save_vr[i][j] = QNaNbarbarian[j];
}
for(j=0; j < 4; j++) vs->save_vscr[j] = 0;
vs->save_vrvalid = 0;
}
for (i=0; i < 4; i++) vs->save_pad5[i] = 0;
for (i=0; i < 7; i++) vs->save_pad6[i] = 0;
*count = PPC_VECTOR_STATE_COUNT;
return KERN_SUCCESS;
default:
return KERN_INVALID_ARGUMENT;
}
}
kern_return_t
act_machine_set_state(
thread_act_t thr_act,
thread_flavor_t flavor,
thread_state_t tstate,
mach_msg_type_number_t count)
{
savearea *sv, *osv, *usv, *ssv;
unsigned int spc, i, *srs, isnew, clgn;
register struct ppc_thread_state *ts;
register struct ppc_exception_state *es;
register struct ppc_float_state *fs;
register struct ppc_vector_state *vs;
spl_t spl;
int kernel_act = thr_act->kernel_loading || thr_act->kernel_loaded;
#if MACH_ASSERT
if (watchacts & WA_STATE)
printf("act_%x act_machine_set_state(thr_act=%x,flav=%x,st=%x,cnt=%x)\n",
current_act(), thr_act, flavor, tstate, count);
#endif
clgn = count;
switch (flavor) {
case PPC_THREAD_STATE:
if (clgn < PPC_THREAD_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
if(clgn > PPC_THREAD_STATE_COUNT) clgn = PPC_THREAD_STATE_COUNT;
break;
case PPC_EXCEPTION_STATE:
if (clgn < PPC_EXCEPTION_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
if(clgn > PPC_EXCEPTION_STATE_COUNT) clgn = PPC_EXCEPTION_STATE_COUNT;
break;
case PPC_FLOAT_STATE:
if (clgn < PPC_FLOAT_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
if(clgn > PPC_FLOAT_STATE_COUNT) clgn = PPC_FLOAT_STATE_COUNT;
break;
case PPC_VECTOR_STATE:
if (clgn < PPC_VECTOR_STATE_COUNT) {
return KERN_INVALID_ARGUMENT;
}
if(clgn > PPC_VECTOR_STATE_COUNT) clgn = PPC_VECTOR_STATE_COUNT;
break;
default:
return KERN_INVALID_ARGUMENT;
}
isnew = 0;
switch (flavor) {
case PPC_THREAD_STATE:
case PPC_EXCEPTION_STATE:
ts = (struct ppc_thread_state *)tstate;
sv = (savearea *)thr_act->mact.pcb;
osv = 0;
while(sv) {
if(sv->save_srr1 & MASK(MSR_PR)) {
break;
}
osv = sv;
sv = sv->save_prev;
}
if(!sv) {
isnew = 1;
sv = save_alloc();
sv->save_act = thr_act;
sv->save_flags |= SAVattach;
sv->save_srr1 = MSR_EXPORT_MASK_SET & ~MASK(MSR_PR);
sv->save_xfpscrpad = 0;
sv->save_xfpscr = 0;
spc = (unsigned int)thr_act->map->pmap->space;
srs = (unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
if(osv) {
osv->save_prev = sv;
}
else {
thr_act->mact.pcb = (pcb_t)sv;
}
sv->save_prev = 0;
}
if(flavor == PPC_THREAD_STATE) {
sv->save_r0 = ts->r0;
sv->save_r1 = ts->r1;
sv->save_r2 = ts->r2;
sv->save_r3 = ts->r3;
sv->save_r4 = ts->r4;
sv->save_r5 = ts->r5;
sv->save_r6 = ts->r6;
sv->save_r7 = ts->r7;
sv->save_r8 = ts->r8;
sv->save_r9 = ts->r9;
sv->save_r10 = ts->r10;
sv->save_r11 = ts->r11;
sv->save_r12 = ts->r12;
sv->save_r13 = ts->r13;
sv->save_r14 = ts->r14;
sv->save_r15 = ts->r15;
sv->save_r16 = ts->r16;
sv->save_r17 = ts->r17;
sv->save_r18 = ts->r18;
sv->save_r19 = ts->r19;
sv->save_r20 = ts->r20;
sv->save_r21 = ts->r21;
sv->save_r22 = ts->r22;
sv->save_r23 = ts->r23;
sv->save_r24 = ts->r24;
sv->save_r25 = ts->r25;
sv->save_r26 = ts->r26;
sv->save_r27 = ts->r27;
sv->save_r28 = ts->r28;
sv->save_r29 = ts->r29;
sv->save_r30 = ts->r30;
sv->save_r31 = ts->r31;
sv->save_cr = ts->cr;
sv->save_xer = ts->xer;
sv->save_lr = ts->lr;
sv->save_ctr = ts->ctr;
sv->save_srr0 = ts->srr0;
sv->save_mq = ts->mq;
sv->save_vrsave = ts->vrsave;
sv->save_srr1 = MSR_PREPARE_FOR_IMPORT(sv->save_srr1, ts->srr1);
if(!kernel_act) sv->save_srr1 |= MSR_EXPORT_MASK_SET;
sv->save_srr1 &= ~(MASK(MSR_FP) | MASK(MSR_VEC));
if(isnew) {
sv->save_dar = 0;
sv->save_dsisr = 0;
sv->save_exception = 0;
}
return KERN_SUCCESS;
}
else {
if(isnew)
for(i=0; i < 32; i+=2) {
((unsigned int *)&sv->save_r0)[i] = ((unsigned int *)&FloatInit)[0];
((unsigned int *)&sv->save_r0)[i+1] = ((unsigned int *)&FloatInit)[1];
}
sv->save_cr = 0;
sv->save_xer = 0;
sv->save_lr = ((unsigned int *)&FloatInit)[0];
sv->save_ctr = ((unsigned int *)&FloatInit)[1];
sv->save_srr0 = ((unsigned int *)&FloatInit)[0];
sv->save_srr1 = MSR_EXPORT_MASK_SET;
sv->save_mq = 0;
sv->save_vrsave = 0;
}
es = (struct ppc_exception_state *) tstate;
sv->save_dar = es->dar;
sv->save_dsisr = es->dsisr;
sv->save_exception = es->exception;
return KERN_SUCCESS;
case PPC_FLOAT_STATE:
spl = splhigh();
if (per_proc_info[cpu_number()].FPU_thread == (unsigned int)thr_act)
if(!thr_act->mact.FPU_lvl) per_proc_info[cpu_number()].FPU_thread = 0;
splx(spl);
sv = (savearea *)thr_act->mact.FPU_pcb;
osv = 0;
if(sv && (sv->save_level_fp == 1)) {
thr_act->mact.FPU_pcb = (pcb_t)sv->save_prev_float;
sv->save_flags &= ~SAVfpuvalid;
if(!(sv->save_flags & SAVinuse)) {
save_release(sv);
}
sv = (savearea *)thr_act->mact.FPU_pcb;
}
while(sv) {
if(!(sv->save_level_fp)) {
break;
}
osv = sv;
sv = sv->save_prev_float;
}
if(!sv) {
sv = (savearea *)thr_act->mact.pcb;
while(sv) {
if(!(sv->save_flags & SAVfpuvalid)) break;
sv = sv->save_prev;
}
if(!sv) {
sv = (savearea *)thr_act->mact.VMX_pcb;
while(sv) {
if(!(sv->save_flags & SAVfpuvalid)) break;
sv = sv->save_prev_vector;
}
}
if(!sv) {
sv = save_alloc();
sv->save_act = thr_act;
spc=(unsigned int)thr_act->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
}
if(osv) {
osv->save_prev_float = sv;
}
else {
thr_act->mact.FPU_pcb = (pcb_t)sv;
}
sv->save_prev_float = 0;
sv->save_level_fp = 0;
sv->save_flags |= SAVfpuvalid;
}
fs = (struct ppc_float_state *) tstate;
bcopy((char *)fs, (char *)&sv->save_fp0, clgn*4);
usv = find_user_regs(thr_act);
if(!usv) usv = get_user_regs(thr_act);
usv->save_xfpscrpad = sv->save_fpscr_pad;
usv->save_xfpscr = sv->save_fpscr;
return KERN_SUCCESS;
case PPC_VECTOR_STATE:
spl = splhigh();
if (per_proc_info[cpu_number()].VMX_thread == (unsigned int)thr_act)
if(!thr_act->mact.VMX_lvl) per_proc_info[cpu_number()].VMX_thread = 0;
splx(spl);
sv = (savearea *)thr_act->mact.VMX_pcb;
osv = 0;
if(sv && (sv->save_level_vec == 1)) {
thr_act->mact.VMX_pcb = (pcb_t)sv->save_prev_vector;
sv->save_flags &= ~SAVvmxvalid;
if(!(sv->save_flags & SAVinuse)) {
save_release(sv);
}
sv = (savearea *)thr_act->mact.VMX_pcb;
}
while(sv) {
if(!(sv->save_level_vec)) {
break;
}
osv = sv;
sv = sv->save_prev_vector;
}
if(!sv) {
sv = (savearea *)thr_act->mact.pcb;
while(sv) {
if(!(sv->save_flags & SAVvmxvalid)) break;
sv = sv->save_prev;
}
if(!sv) {
sv = (savearea *)thr_act->mact.FPU_pcb;
while(sv) {
if(!(sv->save_flags & SAVvmxvalid)) break;
sv = sv->save_prev_float;
}
}
if(!sv) {
sv = save_alloc();
sv->save_act = thr_act;
spc=(unsigned int)thr_act->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
}
if(osv) {
osv->save_prev_vector = sv;
}
else {
thr_act->mact.VMX_pcb = (pcb_t)sv;
}
sv->save_prev_vector = 0;
sv->save_level_vec = 0;
sv->save_flags |= SAVvmxvalid;
}
vs = (struct ppc_vector_state *) tstate;
bcopy((char *)vs, (char *)&sv->save_vr0, clgn*4);
return KERN_SUCCESS;
default:
return KERN_INVALID_ARGUMENT;
}
}
void act_thread_dup(thread_act_t old, thread_act_t new) {
savearea *sv, *osv, *fsv;
unsigned int spc, i, *srs;
fpu_save(old);
vec_save(old);
osv = (savearea *)new->mact.pcb;
sv = 0;
while(osv) {
if(osv->save_srr1 & MASK(MSR_PR)) {
sv=osv;
break;
}
osv=osv->save_prev;
}
if(!sv) {
osv = (savearea *)new->mact.pcb;
sv = save_alloc();
sv->save_flags |= SAVattach;
sv->save_act = new;
spc=(unsigned int)new->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
if(osv) {
sv->save_prev = osv->save_prev;
osv->save_prev = sv;
}
else {
new->mact.pcb = (pcb_t)sv;
}
}
osv = (savearea *)(old->mact.pcb);
while(osv) {
if(osv->save_srr1 & MASK(MSR_PR)) {
break;
}
osv = osv->save_prev;
}
bcopy((char *)&osv->save_srr0, (char *)&sv->save_srr0, sizeof(struct ppc_thread_state));
sv->save_xfpscrpad = osv->save_xfpscrpad;
sv->save_xfpscr = osv->save_xfpscr;
new->mact.FPU_pcb = (pcb_t)0 ;
new->mact.FPU_lvl = (pcb_t)0 ;
new->mact.FPU_cpu = 0 ;
new->mact.VMX_pcb = (pcb_t)0 ;
new->mact.VMX_lvl = (pcb_t)0 ;
new->mact.VMX_cpu = 0 ;
sv->save_prev_float = (savearea *)0;
sv->save_prev_vector = (savearea *)0;
sv->save_level_fp = 0;
sv->save_level_vec = 0;
sv->save_srr1 &= ~(MASK(MSR_FP) | MASK(MSR_VEC));
fsv = (savearea *)old->mact.FPU_pcb;
while(fsv) {
if(!(fsv->save_level_fp)) {
sv->save_flags |= SAVfpuvalid;
bcopy((char *)&osv->save_fp0, (char *)&sv->save_fp0, sizeof(struct ppc_float_state));
new->mact.FPU_pcb = (pcb_t)sv;
break;
}
fsv = fsv->save_prev_float;
}
fsv = (savearea *)old->mact.VMX_pcb;
while(fsv) {
if(!(fsv->save_level_vec)) {
sv->save_flags |= SAVvmxvalid;
bcopy((char *)&osv->save_vr0, (char *)&sv->save_vr0, sizeof(struct ppc_vector_state));
new->mact.VMX_pcb = (pcb_t)sv;
break;
}
fsv = fsv->save_prev_vector;
}
return;
}
struct ppc_saved_state * get_user_regs(thread_act_t act) {
savearea *sv, *osv;
unsigned int spc, i, *srs;
sv = (savearea *)act->mact.pcb;
osv = 0;
while(sv) {
if(sv->save_srr1 & MASK(MSR_PR)) {
break;
}
osv = sv;
sv = sv->save_prev;
}
if(!sv) {
sv = save_alloc();
sv->save_flags |= SAVattach;
sv->save_act = act;
if(osv) {
osv->save_prev = sv;
}
else {
act->mact.pcb = (pcb_t)sv;
}
sv->save_prev = 0;
}
for(i=0; i < 32; i+=2) {
((unsigned int *)&sv->save_r0)[i] = ((unsigned int *)&FloatInit)[0];
((unsigned int *)&sv->save_r0)[i+1] = ((unsigned int *)&FloatInit)[1];
}
sv->save_cr = 0;
sv->save_xer = 0;
sv->save_lr = ((unsigned int *)&FloatInit)[0];
sv->save_ctr = ((unsigned int *)&FloatInit)[1];
sv->save_srr0 = ((unsigned int *)&FloatInit)[0];
sv->save_srr1 = MSR_EXPORT_MASK_SET;
sv->save_mq = 0;
sv->save_vrsave = 0;
sv->save_xfpscrpad = 0;
sv->save_xfpscr = 0;
spc=(unsigned int)act->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
return (struct ppc_saved_state *)sv;
}
struct ppc_saved_state * find_user_regs(thread_act_t act) {
savearea *sv;
sv = (savearea *)act->mact.pcb;
while(sv) {
if(sv->save_srr1 & MASK(MSR_PR)) {
break;
}
sv = sv->save_prev;
}
return (struct ppc_saved_state *)sv;
}
struct ppc_float_state * find_user_fpu(thread_act_t act) {
savearea *fsv;
fsv = (savearea *)act->mact.FPU_pcb;
while(fsv) {
if(!(fsv->save_level_fp)) break;
fsv = fsv->save_prev_float;
}
return (struct ppc_float_state *)&(fsv->save_fp0);
}
kern_return_t
thread_userstack(
thread_t thread,
int flavor,
thread_state_t tstate,
unsigned int count,
vm_offset_t *user_stack,
int *customstack
)
{
struct ppc_thread_state *state;
if (*user_stack == 0)
*user_stack = USRSTACK;
if (customstack)
*customstack = 0;
switch (flavor) {
case PPC_THREAD_STATE:
if (count < PPC_THREAD_STATE_COUNT)
return (KERN_INVALID_ARGUMENT);
state = (struct ppc_thread_state *) tstate;
*user_stack = state->r1 ? state->r1: USRSTACK;
if (customstack && state->r1)
*customstack = 1;
break;
default :
return (KERN_INVALID_ARGUMENT);
}
return (KERN_SUCCESS);
}
kern_return_t
thread_entrypoint(
thread_t thread,
int flavor,
thread_state_t tstate,
unsigned int count,
vm_offset_t *entry_point
)
{
struct ppc_thread_state *state;
if (*entry_point == 0)
*entry_point = VM_MIN_ADDRESS;
switch (flavor) {
case PPC_THREAD_STATE:
if (count < PPC_THREAD_STATE_COUNT)
return (KERN_INVALID_ARGUMENT);
state = (struct ppc_thread_state *) tstate;
*entry_point = state->srr0 ? state->srr0: VM_MIN_ADDRESS;
break;
default:
return (KERN_INVALID_ARGUMENT);
}
return (KERN_SUCCESS);
}
unsigned int get_msr_exportmask(void)
{
return (MSR_EXPORT_MASK_SET);
}
unsigned int get_msr_nbits(void)
{
return (MASK(MSR_POW)|MASK(MSR_ILE)|MASK(MSR_IP)|MASK(MSR_LE));
}
unsigned int get_msr_rbits(void)
{
return (MASK(MSR_PR)|MASK(MSR_ME)|MASK(MSR_IR)|MASK(MSR_DR)|MASK(MSR_EE));
}
void thread_set_child(thread_act_t child, int pid)
{
struct ppc_saved_state *child_state;
child_state = find_user_regs(child);
child_state->r3 = pid;
child_state->r4 = 1;
}
void thread_set_parent(thread_act_t parent, int pid)
{
struct ppc_saved_state *parent_state;
parent_state = find_user_regs(parent);
parent_state->r3 = pid;
parent_state->r4 = 0;
}
void *act_thread_csave(void) {
savearea *sv, *osv, *fsv;
unsigned int spc, i, *srs;
thread_act_t act;
fpu_save(current_act());
vec_save(current_act());
sv = save_alloc();
hw_atomic_add(&saveanchor.saveneed, 1);
act = current_act();
sv->save_flags |= SAVattach;
sv->save_act = act;
spc=(unsigned int)act->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
osv = (savearea *)(act->mact.pcb);
fsv = 0;
while(osv) {
if(osv->save_srr1 & MASK(MSR_PR)) {
fsv = osv;
break;
}
osv = osv->save_prev;
}
if(!fsv) {
for(i=0; i < 32; i+=2) {
((unsigned int *)&sv->save_r0)[i] = ((unsigned int *)&FloatInit)[0];
((unsigned int *)&sv->save_r0)[i+1] = ((unsigned int *)&FloatInit)[1];
}
sv->save_cr = 0;
sv->save_xer = 0;
sv->save_lr = ((unsigned int *)&FloatInit)[0];
sv->save_ctr = ((unsigned int *)&FloatInit)[1];
sv->save_srr0 = ((unsigned int *)&FloatInit)[0];
sv->save_srr1 = MSR_EXPORT_MASK_SET;
sv->save_mq = 0;
sv->save_vrsave = 0;
sv->save_xfpscrpad = 0;
sv->save_xfpscr = 0;
}
else {
bcopy((char *)&fsv->save_srr0, (char *)&sv->save_srr0, sizeof(struct ppc_thread_state));
sv->save_xfpscrpad = osv->save_xfpscrpad;
sv->save_xfpscr = osv->save_xfpscr;
}
sv->save_prev = (savearea *)0xDEBB1ED0;
sv->save_prev_float = (savearea *)0xE5DA11A5;
sv->save_prev_vector = (savearea *)0;
sv->save_level_fp = 0;
sv->save_level_vec = 0;
sv->save_srr1 &= ~(MASK(MSR_FP) | MASK(MSR_VEC));
fsv = (savearea *)act->mact.FPU_pcb;
while(fsv) {
if(!(fsv->save_level_fp)) {
sv->save_flags |= SAVfpuvalid;
bcopy((char *)&fsv->save_fp0, (char *)&sv->save_fp0, sizeof(struct ppc_float_state));
break;
}
fsv = fsv->save_prev_float;
}
fsv = (savearea *)act->mact.VMX_pcb;
while(fsv) {
if(!(fsv->save_level_vec)) {
sv->save_flags |= SAVvmxvalid;
bcopy((char *)&fsv->save_vr0, (char *)&sv->save_vr0, sizeof(struct ppc_vector_state));
break;
}
fsv = fsv->save_prev_vector;
}
return (void *)sv;
}
void act_thread_catt(void *ctx) {
savearea *sv, *osv, *fsv, *psv;
unsigned int spc, i, *srs;
thread_act_t act;
sv = (savearea *)ctx;
if((sv->save_prev != (savearea *)0xDEBB1ED0) || (sv->save_prev_float != (savearea *)0xE5DA11A5)) {
panic("act_thread_catt: attempt to attach invalid context savearea - %08X\n", sv);
}
act = current_act();
for(i=0; i < real_ncpus; i++) {
(void)hw_compare_and_store((unsigned int)act, 0, &per_proc_info[i].FPU_thread);
(void)hw_compare_and_store((unsigned int)act, 0, &per_proc_info[i].VMX_thread);
}
sv->save_prev = (savearea *)0;
sv->save_prev_float = (savearea *)0;
sv->save_prev_vector = (savearea *)0;
sv->save_act = act;
spc=(unsigned int)act->map->pmap->space;
srs=(unsigned int *)&sv->save_sr0;
for(i=0; i < 16; i++) {
srs[i] = SEG_REG_PROT | (i<<20) | spc;
}
sv->save_sr_copyin = SEG_REG_PROT | (SR_COPYIN_NUM<<20) | spc;
osv = (savearea *)act->mact.VMX_pcb;
if(osv && (osv->save_level_vec == 1)) {
psv = osv;
osv = osv->save_prev_vector;
(savearea *)act->mact.VMX_pcb = osv;
psv->save_flags &= ~SAVvmxvalid;
if(!(psv->save_flags & SAVinuse)) {
save_release(psv);
}
}
psv = 0;
while(osv) {
if(!(osv->save_level_vec)) break;
psv = osv;
osv = osv->save_prev_vector;
}
if(osv) {
if(psv) psv->save_prev_vector = 0;
else act->mact.VMX_pcb = 0;
osv->save_flags &= ~SAVvmxvalid;
if(!(osv->save_flags & SAVinuse)) {
save_release(osv);
}
}
if(sv->save_flags & SAVvmxvalid) {
if(psv) psv->save_prev_vector = sv;
else act->mact.VMX_pcb = (pcb_t)sv;
}
osv = (savearea *)act->mact.FPU_pcb;
if(osv && (osv->save_level_fp == 1)) {
psv = osv;
osv = osv->save_prev_float;
(savearea *)act->mact.FPU_pcb = osv;
psv->save_flags &= ~SAVfpuvalid;
if(!(psv->save_flags & SAVinuse)) {
save_release(psv);
}
}
psv = 0;
while(osv) {
if(!(osv->save_level_fp)) break;
psv = osv;
osv = osv->save_prev_float;
}
if(osv) {
if(psv) psv->save_prev_float = 0;
else act->mact.FPU_pcb = 0;
osv->save_flags &= ~SAVfpuvalid;
if(!(osv->save_flags & SAVinuse)) {
save_release(osv);
}
}
if(sv->save_flags & SAVfpuvalid) {
if(psv) psv->save_prev_float = sv;
else act->mact.FPU_pcb = (pcb_t)sv;
}
osv = (savearea *)act->mact.pcb;
psv = 0;
while(osv) {
if(osv->save_srr1 & MASK(MSR_PR)) break;
psv = osv;
osv = osv->save_prev;
}
if(osv) {
if(psv) psv->save_prev = 0;
else act->mact.pcb = 0;
osv->save_flags &= ~SAVattach;
if(!(osv->save_flags & SAVinuse)) {
save_release(osv);
}
}
if(psv) psv->save_prev = sv;
else act->mact.pcb = (pcb_t)sv;
hw_atomic_sub(&saveanchor.saveneed, 1);
}
void act_thread_cfree(void *ctx) {
if((((savearea *)ctx)->save_prev != (savearea *)0xDEBB1ED0) ||
(((savearea *)ctx)->save_prev_float != (savearea *)0xE5DA11A5)) {
panic("act_thread_cfree: attempt to free invalid context savearea - %08X\n", ctx);
}
((savearea *)ctx)->save_flags = 0;
save_release((savearea *)ctx);
hw_atomic_sub(&saveanchor.saveneed, 1);
return;
}