Motorola Oncore GPS receiver

Synopsis

Address: 127.127.30.0
Reference ID: GPS
Driver ID: ONCORE
Serial Port: /dev/cuaa0; 9600 baud, 8-bits, no parity
PPS Port: /dev/xpps0; PPS_CAPTUREASSERT required, PPS_OFFSETASSERT supported.

Description

This driver supports various models of the Motorola Oncore GPS receivers. as long as they support the Motorola Binary Protocol.

The two most interesting version of the Oncore are the "UT+"  and the "Remote" which is a prepackaged "UT+".  The evaluation kit can also be recommended, it interfaces to a PC straightaway, using the parallel port for PPS input (supported under FreeBSD), and packs the receiver in a nice and sturdy box.
 

UT+ oncore
Evaluation kit
Oncore Remote

The driver requires a standard PPS interface for the pulse- per-second output from the receiver.  The serial data stream alone does not provide precision time stamps (0-50msec variance, according to the manual), whereas the PPS output is precise down to 50 nsec (1 sigma) for the UT models.

The driver will use the "position hold" mode if available, with either the receivers built-in site-survey or a similar algorithm implemented in this driver.

Monitor Data

The driver is quite chatty on stdout if ntpd is run with debugging.  A manual will be required though.

Fudge Factors

time1 time
Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.
time2 time
Not used by this driver.
stratum number
Specifies the driver stratum, in decimal from 0 to 15, with default 0.
refid string
Specifies the driver reference identifier, an ASCII string from one to four characters, with default GPS.
flag1 0 | 1
Not used by this driver.
flag2 0 | 1
Assume GPS receiver is on a mobile platform if set.
flag3 0 | 1
Not used by this driver.
flag4 0 | 1
Not used by this driver.
Additional Information

The driver has been developed under FreeBSD, and may still be pretty FreeBSD centric.  Patches are most welcome.

Performance

Really good.  With the UT+, the generated PPS pulse is referenced to UTC(GPS) with better than 50 nsec (1 sigma) accuracy.  The limiting factor will be the timebase of the computer and the precision with which you can timestamp the rising flank of the PPS signal.  Using FreeBSD,  a FPGA based Timecounter/PPS interface and an ovenized quartz oscillator, that performance has been reproduced.  For more details on this aspect:  Sub-Microsecond timekeeping under FreeBSD

Poul-Henning Kamp (phk@FreeBSD.org)