CodeGenRegisters.h [plain text]
#ifndef CODEGEN_REGISTERS_H
#define CODEGEN_REGISTERS_H
#include "SetTheory.h"
#include "llvm/TableGen/Record.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstdlib>
#include <map>
#include <string>
#include <set>
#include <vector>
namespace llvm {
class CodeGenRegBank;
class CodeGenSubRegIndex {
Record *const TheDef;
const unsigned EnumValue;
public:
CodeGenSubRegIndex(Record *R, unsigned Enum);
const std::string &getName() const;
std::string getNamespace() const;
std::string getQualifiedName() const;
struct Less {
bool operator()(const CodeGenSubRegIndex *A,
const CodeGenSubRegIndex *B) const {
assert(A && B);
return A->EnumValue < B->EnumValue;
}
};
typedef std::map<CodeGenSubRegIndex*, CodeGenSubRegIndex*, Less> CompMap;
CodeGenSubRegIndex *compose(CodeGenSubRegIndex *Idx) const {
CompMap::const_iterator I = Composed.find(Idx);
return I == Composed.end() ? 0 : I->second;
}
CodeGenSubRegIndex *addComposite(CodeGenSubRegIndex *A,
CodeGenSubRegIndex *B) {
std::pair<CompMap::iterator, bool> Ins =
Composed.insert(std::make_pair(A, B));
return (Ins.second || Ins.first->second == B) ? 0 : Ins.first->second;
}
void updateComponents(CodeGenRegBank&);
void cleanComposites();
const CompMap &getComposites() const { return Composed; }
private:
CompMap Composed;
};
struct CodeGenRegister {
Record *TheDef;
unsigned EnumValue;
unsigned CostPerUse;
bool CoveredBySubRegs;
typedef std::map<CodeGenSubRegIndex*, CodeGenRegister*,
CodeGenSubRegIndex::Less> SubRegMap;
CodeGenRegister(Record *R, unsigned Enum);
const std::string &getName() const;
const SubRegMap &getSubRegs(CodeGenRegBank&);
const SubRegMap &getSubRegs() const {
assert(SubRegsComplete && "Must precompute sub-registers");
return SubRegs;
}
void addSubRegsPreOrder(SetVector<CodeGenRegister*> &OSet,
CodeGenRegBank&) const;
typedef std::vector<CodeGenRegister*> SuperRegList;
const SuperRegList &getSuperRegs() const {
assert(SubRegsComplete && "Must precompute sub-registers");
return SuperRegs;
}
struct Less {
bool operator()(const CodeGenRegister *A,
const CodeGenRegister *B) const {
assert(A && B);
return A->EnumValue < B->EnumValue;
}
};
typedef std::set<const CodeGenRegister*, Less> Set;
private:
bool SubRegsComplete;
SubRegMap SubRegs;
SuperRegList SuperRegs;
};
class CodeGenRegisterClass {
CodeGenRegister::Set Members;
std::vector<SmallVector<Record*, 16> > Orders;
BitVector SubClasses;
SmallVector<CodeGenRegisterClass*, 4> SuperClasses;
Record *TheDef;
std::string Name;
void inheritProperties(CodeGenRegBank&);
DenseMap<CodeGenSubRegIndex*, CodeGenRegisterClass*> SubClassWithSubReg;
DenseMap<CodeGenSubRegIndex*,
SmallPtrSet<CodeGenRegisterClass*, 8> > SuperRegClasses;
public:
unsigned EnumValue;
std::string Namespace;
std::vector<MVT::SimpleValueType> VTs;
unsigned SpillSize;
unsigned SpillAlignment;
int CopyCost;
bool Allocatable;
DenseMap<Record*,Record*> SubRegClasses;
std::string AltOrderSelect;
Record *getDef() const { return TheDef; }
const std::string &getName() const { return Name; }
std::string getQualifiedName() const;
const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;}
unsigned getNumValueTypes() const { return VTs.size(); }
MVT::SimpleValueType getValueTypeNum(unsigned VTNum) const {
if (VTNum < VTs.size())
return VTs[VTNum];
llvm_unreachable("VTNum greater than number of ValueTypes in RegClass!");
}
bool contains(const CodeGenRegister*) const;
bool hasSubClass(const CodeGenRegisterClass *RC) const {
return SubClasses.test(RC->EnumValue);
}
CodeGenRegisterClass*
getSubClassWithSubReg(CodeGenSubRegIndex *SubIdx) const {
return SubClassWithSubReg.lookup(SubIdx);
}
void setSubClassWithSubReg(CodeGenSubRegIndex *SubIdx,
CodeGenRegisterClass *SubRC) {
SubClassWithSubReg[SubIdx] = SubRC;
}
void getSuperRegClasses(CodeGenSubRegIndex *SubIdx, BitVector &Out) const;
void addSuperRegClass(CodeGenSubRegIndex *SubIdx,
CodeGenRegisterClass *SuperRC) {
SuperRegClasses[SubIdx].insert(SuperRC);
}
const BitVector &getSubClasses() const { return SubClasses; }
ArrayRef<CodeGenRegisterClass*> getSuperClasses() const {
return SuperClasses;
}
ArrayRef<Record*> getOrder(unsigned No = 0) const {
return Orders[No];
}
unsigned getNumOrders() const { return Orders.size(); }
const CodeGenRegister::Set &getMembers() const { return Members; }
CodeGenRegisterClass(CodeGenRegBank&, Record *R);
struct Key {
const CodeGenRegister::Set *Members;
unsigned SpillSize;
unsigned SpillAlignment;
Key(const Key &O)
: Members(O.Members),
SpillSize(O.SpillSize),
SpillAlignment(O.SpillAlignment) {}
Key(const CodeGenRegister::Set *M, unsigned S = 0, unsigned A = 0)
: Members(M), SpillSize(S), SpillAlignment(A) {}
Key(const CodeGenRegisterClass &RC)
: Members(&RC.getMembers()),
SpillSize(RC.SpillSize),
SpillAlignment(RC.SpillAlignment) {}
bool operator<(const Key&) const;
};
CodeGenRegisterClass(StringRef Name, Key Props);
static void computeSubClasses(CodeGenRegBank&);
};
class CodeGenRegBank {
RecordKeeper &Records;
SetTheory Sets;
std::vector<CodeGenSubRegIndex*> SubRegIndices;
DenseMap<Record*, CodeGenSubRegIndex*> Def2SubRegIdx;
unsigned NumNamedIndices;
std::vector<CodeGenRegister*> Registers;
DenseMap<Record*, CodeGenRegister*> Def2Reg;
std::vector<CodeGenRegisterClass*> RegClasses;
DenseMap<Record*, CodeGenRegisterClass*> Def2RC;
typedef std::map<CodeGenRegisterClass::Key, CodeGenRegisterClass*> RCKeyMap;
RCKeyMap Key2RC;
void addToMaps(CodeGenRegisterClass*);
CodeGenRegisterClass *getOrCreateSubClass(const CodeGenRegisterClass *RC,
const CodeGenRegister::Set *Membs,
StringRef Name);
void computeInferredRegisterClasses();
void inferCommonSubClass(CodeGenRegisterClass *RC);
void inferSubClassWithSubReg(CodeGenRegisterClass *RC);
void inferMatchingSuperRegClass(CodeGenRegisterClass *RC,
unsigned FirstSubRegRC = 0);
void computeComposites();
public:
CodeGenRegBank(RecordKeeper&);
SetTheory &getSets() { return Sets; }
ArrayRef<CodeGenSubRegIndex*> getSubRegIndices() { return SubRegIndices; }
unsigned getNumNamedIndices() { return NumNamedIndices; }
CodeGenSubRegIndex *getSubRegIdx(Record*);
CodeGenSubRegIndex *getCompositeSubRegIndex(CodeGenSubRegIndex *A,
CodeGenSubRegIndex *B);
const std::vector<CodeGenRegister*> &getRegisters() { return Registers; }
CodeGenRegister *getReg(Record*);
ArrayRef<CodeGenRegisterClass*> getRegClasses() const {
return RegClasses;
}
CodeGenRegisterClass *getRegClass(Record*);
const CodeGenRegisterClass* getRegClassForRegister(Record *R);
void computeDerivedInfo();
void computeOverlaps(std::map<const CodeGenRegister*,
CodeGenRegister::Set> &Map);
BitVector computeCoveredRegisters(ArrayRef<Record*> Regs);
};
}
#endif