EmulateInstructionARM.h [plain text]
#ifndef lldb_EmulateInstructionARM_h_
#define lldb_EmulateInstructionARM_h_
#include "lldb/Core/EmulateInstruction.h"
#include "lldb/Core/Error.h"
#include "lldb/Interpreter/NamedOptionValue.h"
#include "Plugins/Process/Utility/ARMDefines.h"
namespace lldb_private {
class ITSession
{
public:
ITSession() : ITCounter(0), ITState(0) {}
~ITSession() {}
bool InitIT(uint32_t bits7_0);
void ITAdvance();
bool InITBlock();
bool LastInITBlock();
uint32_t GetCond();
private:
uint32_t ITCounter; uint32_t ITState; };
class EmulateInstructionARM : public EmulateInstruction
{
public:
typedef enum
{
eEncodingA1,
eEncodingA2,
eEncodingA3,
eEncodingA4,
eEncodingA5,
eEncodingT1,
eEncodingT2,
eEncodingT3,
eEncodingT4,
eEncodingT5
} ARMEncoding;
static void
Initialize ();
static void
Terminate ();
static const char *
GetPluginNameStatic ();
static const char *
GetPluginDescriptionStatic ();
static lldb_private::EmulateInstruction *
CreateInstance (const lldb_private::ArchSpec &arch,
InstructionType inst_type);
static bool
SupportsEmulatingIntructionsOfTypeStatic (InstructionType inst_type)
{
switch (inst_type)
{
case eInstructionTypeAny:
case eInstructionTypePrologueEpilogue:
case eInstructionTypePCModifying:
return true;
case eInstructionTypeAll:
return false;
default:
break;
}
return false;
}
virtual const char *
GetPluginName()
{
return "EmulateInstructionARM";
}
virtual const char *
GetShortPluginName()
{
return GetPluginNameStatic();
}
virtual uint32_t
GetPluginVersion()
{
return 1;
}
bool
SetTargetTriple (const ArchSpec &arch);
enum Mode
{
eModeInvalid = -1,
eModeARM,
eModeThumb
};
EmulateInstructionARM (const ArchSpec &arch) :
EmulateInstruction (arch),
m_arm_isa (0),
m_opcode_mode (eModeInvalid),
m_opcode_cpsr (0),
m_it_session (),
m_ignore_conditions (false)
{
SetArchitecture (arch);
}
virtual bool
SupportsEmulatingIntructionsOfType (InstructionType inst_type)
{
return SupportsEmulatingIntructionsOfTypeStatic (inst_type);
}
virtual bool
SetArchitecture (const ArchSpec &arch);
virtual bool
ReadInstruction ();
virtual bool
SetInstruction (const Opcode &insn_opcode, const Address &inst_addr, Target *target);
virtual bool
EvaluateInstruction (uint32_t evaluate_options);
virtual bool
TestEmulation (Stream *out_stream, ArchSpec &arch, OptionValueDictionary *test_data);
virtual bool
GetRegisterInfo (uint32_t reg_kind, uint32_t reg_num, RegisterInfo ®_info);
virtual bool
CreateFunctionEntryUnwind (UnwindPlan &unwind_plan);
uint32_t
ArchVersion();
bool
ConditionPassed (const uint32_t opcode,
bool *is_conditional = NULL);
uint32_t
CurrentCond (const uint32_t opcode);
bool InITBlock();
bool LastInITBlock();
bool
BadMode (uint32_t mode);
bool
CurrentModeIsPrivileged ();
void
CPSRWriteByInstr (uint32_t value, uint32_t bytemask, bool affect_execstate);
bool
BranchWritePC(const Context &context, uint32_t addr);
bool
BXWritePC(Context &context, uint32_t addr);
bool
LoadWritePC(Context &context, uint32_t addr);
bool
ALUWritePC(Context &context, uint32_t addr);
Mode
CurrentInstrSet();
bool
SelectInstrSet(Mode arm_or_thumb);
bool
WriteBits32Unknown (int n);
bool
WriteBits32UnknownToMemory (lldb::addr_t address);
bool
UnalignedSupport();
typedef struct
{
uint32_t result;
uint8_t carry_out;
uint8_t overflow;
} AddWithCarryResult;
AddWithCarryResult
AddWithCarry(uint32_t x, uint32_t y, uint8_t carry_in);
uint32_t
ReadCoreReg (uint32_t regnum, bool *success);
bool
WriteCoreRegOptionalFlags (Context &context,
const uint32_t result,
const uint32_t Rd,
bool setflags,
const uint32_t carry = ~0u,
const uint32_t overflow = ~0u);
bool
WriteCoreReg (Context &context,
const uint32_t result,
const uint32_t Rd)
{
return WriteCoreRegOptionalFlags(context, result, Rd, false);
}
bool
WriteFlags (Context &context,
const uint32_t result,
const uint32_t carry = ~0u,
const uint32_t overflow = ~0u);
inline uint64_t
MemARead (EmulateInstruction::Context &context,
lldb::addr_t address,
uint32_t size,
uint64_t fail_value,
bool *success_ptr)
{
return ReadMemoryUnsigned (context, address, size, fail_value, success_ptr);
}
inline bool
MemAWrite (EmulateInstruction::Context &context,
lldb::addr_t address,
uint64_t data_val,
uint32_t size)
{
return WriteMemoryUnsigned (context, address, data_val, size);
}
inline uint64_t
MemURead (EmulateInstruction::Context &context,
lldb::addr_t address,
uint32_t size,
uint64_t fail_value,
bool *success_ptr)
{
return ReadMemoryUnsigned (context, address, size, fail_value, success_ptr);
}
inline bool
MemUWrite (EmulateInstruction::Context &context,
lldb::addr_t address,
uint64_t data_val,
uint32_t size)
{
return WriteMemoryUnsigned (context, address, data_val, size);
}
protected:
typedef enum
{
eSize16,
eSize32
} ARMInstrSize;
typedef struct
{
uint32_t mask;
uint32_t value;
uint32_t variants;
EmulateInstructionARM::ARMEncoding encoding;
uint32_t vfp_variants;
ARMInstrSize size;
bool (EmulateInstructionARM::*callback) (const uint32_t opcode, const EmulateInstructionARM::ARMEncoding encoding);
const char *name;
} ARMOpcode;
uint32_t
GetFramePointerRegisterNumber () const;
uint32_t
GetFramePointerDWARFRegisterNumber () const;
static ARMOpcode*
GetARMOpcodeForInstruction (const uint32_t opcode, uint32_t isa_mask);
static ARMOpcode*
GetThumbOpcodeForInstruction (const uint32_t opcode, uint32_t isa_mask);
bool
EmulatePUSH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulatePOP (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDRdSPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMOVRdSP (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMOVLowHigh (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRRtPCRelative (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDSPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDSPRm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBLXImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBLXRm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBXRm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBXJRm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBR7IPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBIPSPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBSPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBSPReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRRtSP (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVPUSH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVPOP (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSVC (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateIT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateNop (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateCB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateTB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDImmThumb (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDImmARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADDRegShift (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMOVRdRm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMOVRdImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateCMPImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateCMPReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateASRImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateASRReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLSLImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLSLReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLSRImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLSRReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRORImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRORReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRRX (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateShiftImm (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type);
bool
EmulateShiftReg (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type);
bool
EmulateLDM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDMDA (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDMDB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDMIB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRRtRnImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRImmediateARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRLiteral (const uint32_t, const ARMEncoding encoding);
bool
EmulateLDRRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRBImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRBImmediateARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRBLiteral (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRBRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRBT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRDImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRDLiteral (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRDRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDREX (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDREXB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDREXD (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDREXH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRHImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRHImmediateARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRHLiteral (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRHRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRHT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSBImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSBLiteral (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSBRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSBT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSHImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSHLiteral (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSHRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRSHT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateLDRT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTMDA (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTMDB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTMIB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRThumb(const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRImmARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRBThumb (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRBImmARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRBReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRBT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRDImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRDReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTREX (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTREXB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTREXD (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTREXH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRHImmThumb (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRHImmARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRHRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRHT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSTRT (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADCImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADCReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateADR (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateANDImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateANDReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBICImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBICReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateBXJ (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateCMNImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateCMNReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateEORImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateEORReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMUL (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMVNImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateMVNReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateORRImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateORRReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulatePLDImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulatePLIImmediate (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulatePLIRegister (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRSBImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRSBReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRSCImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRSCReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSBCImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSBCReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBImmThumb (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBImmARM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBRegShift (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSXTB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSXTH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateTEQImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateTEQReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateTSTImm (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateTSTReg (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateUXTB (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateUXTH (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateRFE (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVLDM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVSTM (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVLD1Multiple (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVLD1Single (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVLD1SingleAll (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVST1Multiple (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVST1Single (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVLDR (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateVSTR (const uint32_t opcode, const ARMEncoding encoding);
bool
EmulateSUBSPcLrEtc (const uint32_t opcode, const ARMEncoding encoding);
uint32_t m_arm_isa;
Mode m_opcode_mode;
uint32_t m_opcode_cpsr;
uint32_t m_new_inst_cpsr; ITSession m_it_session;
bool m_ignore_conditions;
};
}
#endif // lldb_EmulateInstructionARM_h_