#ifndef SIM_MAIN_H
#define SIM_MAIN_H
#define USING_SIM_BASE_H
struct _sim_cpu;
typedef struct _sim_cpu SIM_CPU;
#include "symcat.h"
#include "sim-basics.h"
#include "cgen-types.h"
#include "m32r-desc.h"
#include "m32r-opc.h"
#include "arch.h"
typedef USI sim_cia;
#define CIA_GET(cpu) CPU_PC_GET (cpu)
#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
do { \
if (cpu) \
sim_pc_set ((cpu), (cia)); \
} while (0)
#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
do { \
sim_pc_set ((cpu), (cia)); \
} while (0)
#include "sim-base.h"
#include "cgen-sim.h"
#include "m32r-sim.h"
#include "opcode/cgen.h"
struct _sim_cpu {
sim_cpu_base base;
CGEN_CPU cgen_cpu;
M32R_MISC_PROFILE m32r_misc_profile;
#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
#if defined (WANT_CPU_M32RBF)
M32RBF_CPU_DATA cpu_data;
#elif defined (WANT_CPU_M32RXF)
M32RXF_CPU_DATA cpu_data;
#endif
};
struct sim_state {
sim_cpu *cpu;
#define STATE_CPU(sd, n) ( (sd)->cpu)
CGEN_STATE cgen_state;
sim_state_base base;
};
extern SIM_CORE_SIGNAL_FN m32r_core_signal;
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
(TRANSFER), (ERROR))
#define M32R_DEFAULT_MEM_SIZE 0x800000
#endif