#ifdef DEFINE_LABELS
static struct {
int index;
void *label;
} labels[] = {
{ I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
{ I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
{ I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
{ I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
{ I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
{ I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
{ I960BASE_INSN_MULO, && case_sem_INSN_MULO },
{ I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 },
{ I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 },
{ I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 },
{ I960BASE_INSN_REMO, && case_sem_INSN_REMO },
{ I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 },
{ I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 },
{ I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 },
{ I960BASE_INSN_DIVO, && case_sem_INSN_DIVO },
{ I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 },
{ I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 },
{ I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 },
{ I960BASE_INSN_REMI, && case_sem_INSN_REMI },
{ I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 },
{ I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 },
{ I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 },
{ I960BASE_INSN_DIVI, && case_sem_INSN_DIVI },
{ I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 },
{ I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 },
{ I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 },
{ I960BASE_INSN_ADDO, && case_sem_INSN_ADDO },
{ I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 },
{ I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 },
{ I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 },
{ I960BASE_INSN_SUBO, && case_sem_INSN_SUBO },
{ I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 },
{ I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 },
{ I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 },
{ I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT },
{ I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 },
{ I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 },
{ I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 },
{ I960BASE_INSN_AND, && case_sem_INSN_AND },
{ I960BASE_INSN_AND1, && case_sem_INSN_AND1 },
{ I960BASE_INSN_AND2, && case_sem_INSN_AND2 },
{ I960BASE_INSN_AND3, && case_sem_INSN_AND3 },
{ I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT },
{ I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 },
{ I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 },
{ I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 },
{ I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT },
{ I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 },
{ I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 },
{ I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 },
{ I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND },
{ I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 },
{ I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 },
{ I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 },
{ I960BASE_INSN_XOR, && case_sem_INSN_XOR },
{ I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 },
{ I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 },
{ I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 },
{ I960BASE_INSN_OR, && case_sem_INSN_OR },
{ I960BASE_INSN_OR1, && case_sem_INSN_OR1 },
{ I960BASE_INSN_OR2, && case_sem_INSN_OR2 },
{ I960BASE_INSN_OR3, && case_sem_INSN_OR3 },
{ I960BASE_INSN_NOR, && case_sem_INSN_NOR },
{ I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 },
{ I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 },
{ I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 },
{ I960BASE_INSN_XNOR, && case_sem_INSN_XNOR },
{ I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 },
{ I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 },
{ I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 },
{ I960BASE_INSN_NOT, && case_sem_INSN_NOT },
{ I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 },
{ I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 },
{ I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 },
{ I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT },
{ I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 },
{ I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 },
{ I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 },
{ I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT },
{ I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 },
{ I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 },
{ I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 },
{ I960BASE_INSN_SHLO, && case_sem_INSN_SHLO },
{ I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 },
{ I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 },
{ I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 },
{ I960BASE_INSN_SHRO, && case_sem_INSN_SHRO },
{ I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 },
{ I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 },
{ I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 },
{ I960BASE_INSN_SHLI, && case_sem_INSN_SHLI },
{ I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 },
{ I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 },
{ I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 },
{ I960BASE_INSN_SHRI, && case_sem_INSN_SHRI },
{ I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 },
{ I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 },
{ I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 },
{ I960BASE_INSN_EMUL, && case_sem_INSN_EMUL },
{ I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 },
{ I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 },
{ I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 },
{ I960BASE_INSN_MOV, && case_sem_INSN_MOV },
{ I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 },
{ I960BASE_INSN_MOVL, && case_sem_INSN_MOVL },
{ I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 },
{ I960BASE_INSN_MOVT, && case_sem_INSN_MOVT },
{ I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 },
{ I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ },
{ I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 },
{ I960BASE_INSN_MODPC, && case_sem_INSN_MODPC },
{ I960BASE_INSN_MODAC, && case_sem_INSN_MODAC },
{ I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET },
{ I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET },
{ I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT },
{ I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX },
{ I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP },
{ I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP },
{ I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP },
{ I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET },
{ I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET },
{ I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT },
{ I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX },
{ I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP },
{ I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP },
{ I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP },
{ I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET },
{ I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET },
{ I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT },
{ I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX },
{ I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP },
{ I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP },
{ I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP },
{ I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET },
{ I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET },
{ I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT },
{ I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX },
{ I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP },
{ I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP },
{ I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP },
{ I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET },
{ I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET },
{ I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT },
{ I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX },
{ I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP },
{ I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP },
{ I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP },
{ I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET },
{ I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET },
{ I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT },
{ I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX },
{ I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP },
{ I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP },
{ I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP },
{ I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET },
{ I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET },
{ I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT },
{ I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX },
{ I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP },
{ I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP },
{ I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP },
{ I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET },
{ I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET },
{ I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT },
{ I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX },
{ I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP },
{ I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP },
{ I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP },
{ I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET },
{ I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET },
{ I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT },
{ I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX },
{ I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP },
{ I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP },
{ I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP },
{ I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET },
{ I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET },
{ I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT },
{ I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX },
{ I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP },
{ I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP },
{ I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP },
{ I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET },
{ I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET },
{ I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT },
{ I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX },
{ I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP },
{ I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP },
{ I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP },
{ I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET },
{ I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET },
{ I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT },
{ I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX },
{ I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP },
{ I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP },
{ I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP },
{ I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET },
{ I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET },
{ I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT },
{ I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX },
{ I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP },
{ I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP },
{ I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP },
{ I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET },
{ I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET },
{ I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT },
{ I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX },
{ I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP },
{ I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP },
{ I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP },
{ I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET },
{ I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET },
{ I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT },
{ I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX },
{ I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP },
{ I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP },
{ I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP },
{ I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP },
{ I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG },
{ I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT },
{ I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG },
{ I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT },
{ I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG },
{ I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT },
{ I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG },
{ I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT },
{ I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG },
{ I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT },
{ I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG },
{ I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT },
{ I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG },
{ I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT },
{ I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG },
{ I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT },
{ I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG },
{ I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT },
{ I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG },
{ I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT },
{ I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG },
{ I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT },
{ I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG },
{ I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT },
{ I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG },
{ I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT },
{ I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG },
{ I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT },
{ I960BASE_INSN_CMPI, && case_sem_INSN_CMPI },
{ I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 },
{ I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 },
{ I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 },
{ I960BASE_INSN_CMPO, && case_sem_INSN_CMPO },
{ I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 },
{ I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 },
{ I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 },
{ I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG },
{ I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG },
{ I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG },
{ I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG },
{ I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG },
{ I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG },
{ I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG },
{ I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG },
{ I960BASE_INSN_BNO, && case_sem_INSN_BNO },
{ I960BASE_INSN_BG, && case_sem_INSN_BG },
{ I960BASE_INSN_BE, && case_sem_INSN_BE },
{ I960BASE_INSN_BGE, && case_sem_INSN_BGE },
{ I960BASE_INSN_BL, && case_sem_INSN_BL },
{ I960BASE_INSN_BNE, && case_sem_INSN_BNE },
{ I960BASE_INSN_BLE, && case_sem_INSN_BLE },
{ I960BASE_INSN_BO, && case_sem_INSN_BO },
{ I960BASE_INSN_B, && case_sem_INSN_B },
{ I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET },
{ I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT },
{ I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX },
{ I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP },
{ I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP },
{ I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP },
{ I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT },
{ I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET },
{ I960BASE_INSN_RET, && case_sem_INSN_RET },
{ I960BASE_INSN_CALLS, && case_sem_INSN_CALLS },
{ I960BASE_INSN_FMARK, && case_sem_INSN_FMARK },
{ I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG },
{ 0, 0 }
};
int i;
for (i = 0; labels[i].label != 0; ++i)
{
#if FAST_P
CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
#else
CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
#endif
}
#undef DEFINE_LABELS
#endif
#ifdef DEFINE_SWITCH
#if FAST_P
#undef TRACE_RESULT
#define TRACE_RESULT(cpu, abuf, name, type, val)
#endif
#undef GET_ATTR
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
{
#if WITH_SCACHE_PBB
#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
#else
#define NEXT(vpc) BREAK (sem)
#ifdef __GNUC__
#if FAST_P
SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
#else
SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
#endif
#else
SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
#endif
#endif
{
CASE (sem, INSN_X_INVALID) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
SET_H_PC (pc);
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_X_AFTER) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
#if WITH_SCACHE_PBB_I960BASE
i960base_pbb_after (current_cpu, sem_arg);
#endif
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_X_BEFORE) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
#if WITH_SCACHE_PBB_I960BASE
i960base_pbb_before (current_cpu, sem_arg);
#endif
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_X_CTI_CHAIN) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
#if WITH_SCACHE_PBB_I960BASE
#ifdef DEFINE_SWITCH
vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
pbb_br_type, pbb_br_npc);
BREAK (sem);
#else
vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
CPU_PBB_BR_TYPE (current_cpu),
CPU_PBB_BR_NPC (current_cpu));
#endif
#endif
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_X_CHAIN) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
#if WITH_SCACHE_PBB_I960BASE
vpc = i960base_pbb_chain (current_cpu, sem_arg);
#ifdef DEFINE_SWITCH
BREAK (sem);
#endif
#endif
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_X_BEGIN) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
#if WITH_SCACHE_PBB_I960BASE
#ifdef DEFINE_SWITCH
vpc = i960base_pbb_begin (current_cpu, FAST_P);
#else
vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
#endif
#endif
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MULO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MULSI (* FLD (i_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MULO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MULSI (FLD (f_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MULO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MULSI (* FLD (i_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MULO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MULSI (FLD (f_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UMODSI (* FLD (i_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UMODSI (FLD (f_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UMODSI (FLD (f_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = UDIVSI (FLD (f_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMI) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MODSI (* FLD (i_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMI1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MODSI (* FLD (i_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMI2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MODSI (FLD (f_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_REMI3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = MODSI (FLD (f_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVI) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVI1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = DIVSI (* FLD (i_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVI2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = DIVSI (FLD (f_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_DIVI3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = DIVSI (FLD (f_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ADDO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ADDO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (FLD (f_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ADDO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (* FLD (i_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ADDO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (FLD (f_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SUBO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SUBO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = SUBSI (* FLD (i_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SUBO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = SUBSI (FLD (f_src2), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SUBO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = SUBSI (FLD (f_src2), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTBIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTBIT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTBIT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTBIT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_AND) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_AND1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (FLD (f_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_AND2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (* FLD (i_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_AND3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (FLD (f_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ANDNOT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ANDNOT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ANDNOT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ANDNOT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SETBIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SETBIT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SETBIT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SETBIT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTAND) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTAND1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTAND2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOTAND3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XOR) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (* FLD (i_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XOR1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (FLD (f_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XOR2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (* FLD (i_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XOR3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = XORSI (FLD (f_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_OR) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (* FLD (i_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_OR1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (FLD (f_src1), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_OR2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (* FLD (i_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_OR3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (FLD (f_src1), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOR) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOR1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOR2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOR3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XNOR) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XNOR1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XNOR2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_XNOR3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (* FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (* FLD (i_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_NOT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = INVSI (FLD (f_src1));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ORNOT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ORNOT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ORNOT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ORNOT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CLRBIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CLRBIT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CLRBIT2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CLRBIT3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLI) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLI1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLI2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHLI3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRI) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRI1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRI2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_SHRI3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_EMUL) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
DI tmp_temp;
SI tmp_dregno;
tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2)));
tmp_dregno = FLD (f_srcdst);
{
SI opval = TRUNCDISI (tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_EMUL1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
DI tmp_temp;
SI tmp_dregno;
tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2)));
tmp_dregno = FLD (f_srcdst);
{
SI opval = TRUNCDISI (tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_EMUL2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
DI tmp_temp;
SI tmp_dregno;
tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2)));
tmp_dregno = FLD (f_srcdst);
{
SI opval = TRUNCDISI (tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_EMUL3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
DI tmp_temp;
SI tmp_dregno;
tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2)));
tmp_dregno = FLD (f_srcdst);
{
SI opval = TRUNCDISI (tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOV) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOV1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = FLD (f_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVL) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_movq.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
SI tmp_sregno;
tmp_dregno = FLD (f_srcdst);
tmp_sregno = FLD (f_src1);
{
SI opval = * FLD (i_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVL1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
{
SI opval = FLD (f_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_movq.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
SI tmp_sregno;
tmp_dregno = FLD (f_srcdst);
tmp_sregno = FLD (f_src1);
{
SI opval = * FLD (i_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVT1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_movq.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
{
SI opval = FLD (f_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVQ) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_movq.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
SI tmp_sregno;
tmp_dregno = FLD (f_srcdst);
tmp_sregno = FLD (f_src1);
{
SI opval = * FLD (i_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]);
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MOVQ1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_movq.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
{
SI opval = FLD (f_src1);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = 0;
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MODPC) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_src2);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_MODAC) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_src2);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = FLD (f_offset);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_abase);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = FLD (f_optdisp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_offset);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = * FLD (i_abase);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_optdisp);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_offset);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = * FLD (i_abase);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_optdisp);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_offset);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = * FLD (i_abase);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = FLD (f_optdisp);
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
SI tmp_dregno;
tmp_dregno = FLD (f_srcdst);
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
{
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
* FLD (i_dst) = opval;
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
}
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
QI opval = * FLD (i_st_src);
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
HI opval = * FLD (i_st_src);
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_sregno;
tmp_sregno = FLD (f_srcdst);
{
SI opval = * FLD (i_st_src);
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
{
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBNE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBNE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBL_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBL_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBLE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBLE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBG_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBG_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBGE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPOBGE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBNE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBNE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBL_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBL_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBLE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBLE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBG_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBG_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBGE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPIBGE_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BBC_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BBC_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BBS_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BBS_LIT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
{
USI opval = FLD (i_br_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPI) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPI1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPI2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPI3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPO1) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul1.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPO2) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CMPO3) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul3.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
CPU (h_cc) = opval;
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTNO_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = EQSI (CPU (h_cc), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTG_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 1), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 2), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTGE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 3), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTL_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 4), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTNE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 5), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTLE_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 6), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_TESTO_REG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_testno_reg.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = NESI (ANDSI (CPU (h_cc), 7), 0);
* FLD (i_br_src1) = opval;
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
}
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BNO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (EQSI (CPU (h_cc), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BE) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BGE) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BL) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BNE) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BLE) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BO) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
abuf->written = written;
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_B) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_bno.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
USI opval = FLD (i_ctrl_disp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BX_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BX_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
USI opval = * FLD (i_abase);
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BX_INDIRECT_INDEX) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
USI opval = FLD (f_optdisp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_BX_INDIRECT_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CALLX_DISP) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_callx_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
{
SI tmp_temp;
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
{
SI opval = ADDSI (pc, 8);
CPU (h_gr[((UINT) 2)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
}
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
{
USI opval = FLD (f_optdisp);
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
{
SI opval = CPU (h_gr[((UINT) 31)]);
CPU (h_gr[((UINT) 0)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
}
{
SI opval = tmp_temp;
CPU (h_gr[((UINT) 31)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
}
{
SI opval = ADDSI (tmp_temp, 64);
CPU (h_gr[((UINT) 1)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
}
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CALLX_INDIRECT) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
{
SI opval = ADDSI (pc, 4);
CPU (h_gr[((UINT) 2)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
}
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
{
USI opval = * FLD (i_abase);
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
{
SI opval = CPU (h_gr[((UINT) 31)]);
CPU (h_gr[((UINT) 0)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
}
{
SI opval = tmp_temp;
CPU (h_gr[((UINT) 31)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
}
{
SI opval = ADDSI (tmp_temp, 64);
CPU (h_gr[((UINT) 1)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
}
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CALLX_INDIRECT_OFFSET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI tmp_temp;
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
{
SI opval = ADDSI (pc, 4);
CPU (h_gr[((UINT) 2)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
}
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
{
USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
{
SI opval = CPU (h_gr[((UINT) 31)]);
CPU (h_gr[((UINT) 0)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
}
{
SI opval = tmp_temp;
CPU (h_gr[((UINT) 31)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
}
{
SI opval = ADDSI (tmp_temp, 64);
CPU (h_gr[((UINT) 1)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
}
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_RET) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_callx_disp.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
{
SI opval = CPU (h_gr[((UINT) 0)]);
CPU (h_gr[((UINT) 31)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
}
CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0));
CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4));
CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8));
CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12));
CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16));
CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20));
CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24));
CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28));
CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32));
CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36));
CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40));
CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44));
CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48));
CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52));
CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56));
CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60));
{
USI opval = CPU (h_gr[((UINT) 2)]);
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_CALLS) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.sfmt_emul2.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = i960_trap (current_cpu, pc, * FLD (i_src1));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_FMARK) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
SI opval = i960_breakpoint (current_cpu, pc);
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
SEM_BRANCH_FINI (vpc);
#undef FLD
}
NEXT (vpc);
CASE (sem, INSN_FLUSHREG) :
{
SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
((void) 0);
#undef FLD
}
NEXT (vpc);
}
ENDSWITCH (sem)
}
#undef DEFINE_SWITCH
#endif