#include <errno.h>
#include "dis-asm.h"
#include "bfd.h"
#include "sim-main.h"
#include "sim-fpu.h"
#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
#ifndef SIZE_INSTRUCTION
#define SIZE_INSTRUCTION 16
#endif
#ifndef SIZE_LOCATION
#define SIZE_LOCATION 20
#endif
#ifndef SIZE_PC
#define SIZE_PC 6
#endif
#ifndef SIZE_LINE_NUMBER
#define SIZE_LINE_NUMBER 4
#endif
#ifndef SIZE_CYCLE_COUNT
#define SIZE_CYCLE_COUNT 2
#endif
#ifndef SIZE_TOTAL_CYCLE_COUNT
#define SIZE_TOTAL_CYCLE_COUNT 9
#endif
#ifndef SIZE_TRACE_BUF
#define SIZE_TRACE_BUF 1024
#endif
static char trace_buf[SIZE_TRACE_BUF];
static char *bufptr;
static int first_insn_p;
static int printed_result_p;
static const struct cgen_insn *current_insn;
static const struct argbuf *current_abuf;
void
trace_insn_init (SIM_CPU *cpu, int first_p)
{
bufptr = trace_buf;
*bufptr = 0;
first_insn_p = first_p;
current_insn = NULL;
current_abuf = NULL;
}
void
trace_insn_fini (SIM_CPU *cpu, const struct argbuf *abuf, int last_p)
{
SIM_DESC sd = CPU_STATE (cpu);
if (current_insn == NULL)
return;
if (PROFILE_MODEL_P (cpu)
&& ARGBUF_PROFILE_P (current_abuf))
{
unsigned long total = PROFILE_MODEL_TOTAL_CYCLES (CPU_PROFILE_DATA (cpu));
unsigned long this_insn = PROFILE_MODEL_CUR_INSN_CYCLES (CPU_PROFILE_DATA (cpu));
if (last_p)
{
trace_printf (sd, cpu, "%-*ld %-*ld ",
SIZE_CYCLE_COUNT, this_insn,
SIZE_TOTAL_CYCLE_COUNT, total);
}
else
{
trace_printf (sd, cpu, "%-*ld %-*s ",
SIZE_CYCLE_COUNT, this_insn,
SIZE_TOTAL_CYCLE_COUNT, "---");
}
}
trace_printf (sd, cpu, "%s", TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
#if 0
{
const CGEN_OPINST *opinst = CGEN_INSN_OPERANDS (current_insn);
if (opinst)
{
int i;
int indices[MAX_OPERAND_INSTANCES];
CGEN_SYM (get_insn_operands) (CPU_CPU_DESC (cpu), current_insn,
0, CGEN_FIELDS_BITSIZE (&insn_fields),
indices);
for (i = 0;
CGEN_OPINST_TYPE (opinst) != CGEN_OPINST_END;
++i, ++opinst)
{
if (CGEN_OPINST_TYPE (opinst) == CGEN_OPINST_OUTPUT)
trace_result (cpu, current_insn, opinst, indices[i]);
}
}
}
#endif
if (*trace_buf)
trace_printf (sd, cpu, " %s\n", trace_buf);
else
trace_printf (sd, cpu, "\n");
}
void
trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
const struct argbuf *abuf, IADDR pc)
{
char disasm_buf[50];
printed_result_p = 0;
current_insn = opcode;
current_abuf = abuf;
if (CGEN_INSN_VIRTUAL_P (opcode))
{
trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, 0,
NULL, 0, CGEN_INSN_NAME (opcode));
return;
}
CPU_DISASSEMBLER (cpu) (cpu, opcode, abuf, pc, disasm_buf);
trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu),
NULL, 0,
"%s%-*s",
first_insn_p ? " " : "|",
SIZE_INSTRUCTION, disasm_buf);
}
void
trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
{
va_list args;
int printed_one_p = 0;
char *fmt;
va_start (args, name);
trace_printf (CPU_STATE (cpu), cpu, "Extract: 0x%.*lx: %s ",
SIZE_PC, pc, name);
do {
int type,ival;
fmt = va_arg (args, char *);
if (fmt)
{
if (printed_one_p)
trace_printf (CPU_STATE (cpu), cpu, ", ");
printed_one_p = 1;
type = va_arg (args, int);
switch (type)
{
case 'x' :
ival = va_arg (args, int);
trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
break;
default :
abort ();
}
}
} while (fmt);
va_end (args);
trace_printf (CPU_STATE (cpu), cpu, "\n");
}
void
trace_result (SIM_CPU *cpu, char *name, int type, ...)
{
va_list args;
va_start (args, type);
if (printed_result_p)
cgen_trace_printf (cpu, ", ");
switch (type)
{
case 'x' :
default :
cgen_trace_printf (cpu, "%s <- 0x%x", name, va_arg (args, int));
break;
case 'f':
{
DI di;
sim_fpu f;
di = va_arg (args, DI);
sim_fpu_64to (&f, di);
cgen_trace_printf (cpu, "%s <- ", name);
sim_fpu_printn_fpu (&f, (sim_fpu_print_func *) cgen_trace_printf, 4, cpu);
break;
}
case 'D' :
{
DI di;
di = va_arg (args, DI);
cgen_trace_printf (cpu, "%s <- 0x%x%08x", name,
GETHIDI(di), GETLODI (di));
break;
}
}
printed_result_p = 1;
va_end (args);
}
void
cgen_trace_printf (SIM_CPU *cpu, char *fmt, ...)
{
va_list args;
va_start (args, fmt);
if (bufptr == NULL)
{
if (TRACE_FILE (CPU_TRACE_DATA (cpu)) == NULL)
(* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
(STATE_CALLBACK (CPU_STATE (cpu)), fmt, args);
else
vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, args);
}
else
{
vsprintf (bufptr, fmt, args);
bufptr += strlen (bufptr);
if (bufptr - trace_buf > SIZE_TRACE_BUF)
abort ();
}
va_end (args);
}
int
sim_disasm_sprintf VPARAMS ((SFILE *f, const char *format, ...))
{
#ifndef __STDC__
SFILE *f;
const char *format;
#endif
int n;
va_list args;
VA_START (args, format);
#ifndef __STDC__
f = va_arg (args, SFILE *);
format = va_arg (args, char *);
#endif
vsprintf (f->current, format, args);
f->current += n = strlen (f->current);
va_end (args);
return n;
}
int
sim_disasm_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
struct disassemble_info *info)
{
SIM_CPU *cpu = (SIM_CPU *) info->application_data;
SIM_DESC sd = CPU_STATE (cpu);
int length_read;
length_read = sim_core_read_buffer (sd, cpu, read_map, myaddr, memaddr,
length);
if (length_read != length)
return EIO;
return 0;
}
void
sim_disasm_perror_memory (int status, bfd_vma memaddr,
struct disassemble_info *info)
{
if (status != EIO)
info->fprintf_func (info->stream, "Unknown error %d.", status);
else
info->fprintf_func (info->stream,
"Address 0x%x is out of bounds.",
(int) memaddr);
}
void
sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
const ARGBUF *abuf, IADDR pc, char *buf)
{
unsigned int length;
unsigned int base_length;
unsigned long insn_value;
struct disassemble_info disasm_info;
SFILE sfile;
union {
unsigned8 bytes[CGEN_MAX_INSN_SIZE];
unsigned16 shorts[8];
unsigned32 words[4];
} insn_buf;
SIM_DESC sd = CPU_STATE (cpu);
CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu);
CGEN_EXTRACT_INFO ex_info;
CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
int insn_bit_length = CGEN_INSN_BITSIZE (insn);
int insn_length = insn_bit_length / 8;
sfile.buffer = sfile.current = buf;
INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
(fprintf_ftype) sim_disasm_sprintf);
disasm_info.endian =
(bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
: bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
: BFD_ENDIAN_UNKNOWN);
length = sim_core_read_buffer (sd, cpu, read_map, &insn_buf, pc,
insn_length);
if (length != insn_length)
{
sim_io_error (sd, "unable to read address %x", pc);
}
if (insn_bit_length <= 32)
base_length = insn_bit_length;
else
base_length = min (cd->base_insn_bitsize, insn_bit_length);
switch (base_length)
{
case 0 : return;
case 8 : insn_value = insn_buf.bytes[0]; break;
case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
default: abort ();
}
disasm_info.buffer_vma = pc;
disasm_info.buffer = insn_buf.bytes;
disasm_info.buffer_length = length;
ex_info.dis_info = (PTR) &disasm_info;
ex_info.valid = (1 << length) - 1;
ex_info.insn_bytes = insn_buf.bytes;
length = (*CGEN_EXTRACT_FN (cd, insn)) (cd, insn, &ex_info, insn_value, fields, pc);
if (length == insn_bit_length)
{
(*CGEN_PRINT_FN (cd, insn)) (cd, &disasm_info, insn, fields, pc, length);
}
else
{
strcpy (buf, "***unknown***");
}
}