#include "config.h"
#include "system.h"
#include "rtl.h"
#include "function.h"
#include "output.h"
#include "tree.h"
#include "expr.h"
#include "regs.h"
#include "flags.h"
#include "hard-reg-set.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
extern const char *reg_names[];
rtx cmp_op0=0, cmp_op1=0;
static const char *const cmp_tab[] = {
"gt", "gt", "eq", "eq", "ge", "ge", "lt", "lt", "ne", "ne",
"le", "le" };
static bool elxsi_assemble_integer PARAMS ((rtx, unsigned int, int));
static void elxsi_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
static void elxsi_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
#undef TARGET_ASM_BYTE_OP
#define TARGET_ASM_BYTE_OP NULL
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP NULL
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP NULL
#undef TARGET_ASM_INTEGER
#define TARGET_ASM_INTEGER elxsi_assemble_integer
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE elxsi_output_function_prologue
#undef TARGET_ASM_FUNCTION_EPILOGUE
#define TARGET_ASM_FUNCTION_EPILOGUE elxsi_output_function_epilogue
struct gcc_target targetm = TARGET_INITIALIZER;
static bool
elxsi_assemble_integer (x, size, aligned_p)
rtx x;
unsigned int size;
int aligned_p;
{
if (aligned_p)
switch (size)
{
case 1:
case 2:
case 4:
fputs ("\t.data\t", asm_out_file);
output_addr_const (asm_out_file, x);
fprintf (asm_out_file, "{%d}\n", size * BITS_PER_UNIT);
return true;
}
return default_assemble_integer (x, size, aligned_p);
}
static void
elxsi_output_function_prologue (file, size)
FILE *file;
HOST_WIDE_INT size;
{
register int regno;
register int cnt = 0;
if (frame_pointer_needed)
regs_ever_live[14] = 1, call_used_regs[14] = 0;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (regs_ever_live[regno] && !call_used_regs[regno])
cnt += 8;
if (size + cnt)
fprintf (file, "\tadd.64\t.sp,=%d\n", -size - cnt);
cnt = 0;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (regs_ever_live[regno] && !call_used_regs[regno])
fprintf (file, "\tst.64\t.r%d,[.sp]%d\n", regno, (cnt += 8) - 12);
if (frame_pointer_needed)
fprintf (file, "\tadd.64\t.r14,.sp,=%d\n", size + cnt);
}
static void
elxsi_output_function_epilogue (file, size)
FILE *file;
HOST_WIDE_INT size;
{
register int regno;
register int cnt = 0;
if (current_function_calls_alloca || size >= (256 - 8 * 10))
{
fprintf (file, "\tld.64\t.r4,.r14\n");
for (regno = FIRST_PSEUDO_REGISTER-1; regno >= 0; --regno)
if (regs_ever_live[regno] && !call_used_regs[regno])
cnt += 8;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; ++regno)
if (regs_ever_live[regno] && !call_used_regs[regno])
fprintf (file, "\tld.64\t.r%d,[.r14]%d\n", regno,
-((cnt -= 8) + 8) - 4 - size);
fprintf (file, "\tld.64\t.sp,.r4\n\texit\t0\n");
}
else
{
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; ++regno)
if (regs_ever_live[regno] && !call_used_regs[regno])
fprintf (file, "\tld.64\t.r%d,[.sp]%d\n", regno, (cnt += 8) - 12);
fprintf (file, "\texit\t%d\n", size + cnt);
}
}
const char *
cmp_jmp (s, type, where)
const char *s;
int type;
rtx where;
{
rtx br_ops[3];
char template[50];
const char *f = "";
const char *bits = "64";
if (GET_MODE (cmp_op0) == SFmode) f = "f", bits = "32";
if (GET_MODE (cmp_op0) == DFmode) f = "f";
br_ops[0] = where;
br_ops[1] = cmp_op0;
br_ops[2] = cmp_op1;
if (cmp_op1)
sprintf(template, "%scmp%s.br.%s\t%%1,%%2:j%s\t%%l0",
f, s, bits, cmp_tab[type]);
else if (*f)
sprintf(template, "fcmp.br.%s\t%%1,=0:j%s\t%%l0",
bits, cmp_tab[type]);
else if (*s)
sprintf(template, "cmpu.br.64\t%%1,=0:j%s\t%%l0", s);
else
sprintf(template, "jmp.%s\t%%1,%%l0", cmp_tab[type+1]);
output_asm_insn(template, br_ops);
return "";
}
const char *
cmp_set (s, type, reg)
const char *s, *type;
rtx reg;
{
rtx br_ops[3];
char template[50];
const char *f = "";
const char *bits = "64";
if (GET_MODE (cmp_op0) == SFmode) f = "f", bits = "32";
else if (GET_MODE (cmp_op0) == DFmode) f = "f";
else if (GET_MODE (cmp_op0) == SImode) bits = "32";
else if (GET_MODE (cmp_op0) == HImode) bits = "16";
else if (GET_MODE (cmp_op0) == QImode) bits = "8";
br_ops[0] = reg;
br_ops[1] = cmp_op0;
br_ops[2] = cmp_op1;
if (cmp_op1)
sprintf(template, "%scmp%s.%s\t%%0,%%1,%%2:%s",
f, s, bits, type);
else
sprintf(template, "%scmp%s.%s\t%%0,%%1,=0:%s",
f, s, bits, type);
output_asm_insn(template, br_ops);
return "";
}
void
print_operand_address (file, addr)
FILE *file;
register rtx addr;
{
register rtx reg1, reg2, breg, ireg;
rtx offset;
switch (GET_CODE (addr))
{
case MEM:
if (GET_CODE (XEXP (addr, 0)) == REG)
fprintf (file, "%s", reg_names[REGNO (addr)]);
else abort();
break;
case REG:
fprintf (file, "[%s]", reg_names[REGNO (addr)]);
break;
case PLUS:
reg1 = 0; reg2 = 0;
ireg = 0; breg = 0;
offset = 0;
if (GET_CODE (XEXP (addr, 0)) == REG)
{
offset = XEXP (addr, 1);
addr = XEXP (addr, 0);
}
else if (GET_CODE (XEXP (addr, 1)) == REG)
{
offset = XEXP (addr, 0);
addr = XEXP (addr, 1);
}
fprintf (file, "[%s]", reg_names[REGNO (addr)]);
output_address (offset);
break;
default:
output_addr_const (file, addr);
}
}