#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \
-Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"
#define TARGET_VERSION ;
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT ((char *)0)
#endif
#define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_cpu)"
#define CPP_CPU_SPEC \
"%{!mcpu*: \
%{mpower: %{!mpower2: -D_ARCH_PWR}} \
%{mpower2: -D_ARCH_PWR2} \
%{mpowerpc*: -D_ARCH_PPC} \
%{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \
%{!mno-power: %{!mpower2: %(cpp_default)}}} \
%{mcpu=common: -D_ARCH_COM} \
%{mcpu=power: -D_ARCH_PWR} \
%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rios2: -D_ARCH_PWR2} \
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=401: -D_ARCH_PPC} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=ec603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
%{mcpu=604e: -D_ARCH_PPC} \
%{mcpu=620: -D_ARCH_PPC} \
%{mcpu=740: -D_ARCH_PPC} \
%{mcpu=750: -D_ARCH_PPC} \
%{mcpu=801: -D_ARCH_PPC} \
%{mcpu=821: -D_ARCH_PPC} \
%{mcpu=823: -D_ARCH_PPC} \
%{mcpu=860: -D_ARCH_PPC}"
#ifndef CPP_DEFAULT_SPEC
#define CPP_DEFAULT_SPEC "-D_ARCH_PWR"
#endif
#ifndef CPP_SYSV_SPEC
#define CPP_SYSV_SPEC ""
#endif
#ifndef CPP_ENDIAN_SPEC
#define CPP_ENDIAN_SPEC ""
#endif
#ifndef CPP_ENDIAN_DEFAULT_SPEC
#define CPP_ENDIAN_DEFAULT_SPEC ""
#endif
#ifndef CPP_SYSV_DEFAULT_SPEC
#define CPP_SYSV_DEFAULT_SPEC ""
#endif
#define ASM_CPU_SPEC \
"%{!mcpu*: \
%{mpower: %{!mpower2: -mpwr}} \
%{mpower2: -mpwrx} \
%{mpowerpc*: -mppc} \
%{mno-power: %{!mpowerpc*: -mcom}} \
%{!mno-power: %{!mpower2: %(asm_default)}}} \
%{mcpu=common: -mcom} \
%{mcpu=power: -mpwr} \
%{mcpu=power2: -mpwrx} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rios2: -mpwrx} \
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=401: -mppc} \
%{mcpu=403: -mppc} \
%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=ec603e: -mppc} \
%{mcpu=604: -mppc} \
%{mcpu=604e: -mppc} \
%{mcpu=620: -mppc} \
%{mcpu=740: -mppc} \
%{mcpu=750: -mppc} \
%{mcpu=801: -mppc} \
%{mcpu=821: -mppc} \
%{mcpu=823: -mppc} \
%{mcpu=860: -mppc} \
%{faltivec: -mvec}"
#ifndef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC ""
#endif
#ifndef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS
#endif
#define EXTRA_SPECS \
{ "cpp_cpu", CPP_CPU_SPEC }, \
{ "cpp_default", CPP_DEFAULT_SPEC }, \
{ "cpp_sysv", CPP_SYSV_SPEC }, \
{ "cpp_sysv_default", CPP_SYSV_DEFAULT_SPEC }, \
{ "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC }, \
{ "cpp_endian", CPP_ENDIAN_SPEC }, \
{ "asm_cpu", ASM_CPU_SPEC }, \
{ "asm_default", ASM_DEFAULT_SPEC }, \
{ "link_syscalls", LINK_SYSCALLS_SPEC }, \
{ "link_libg", LINK_LIBG_SPEC }, \
SUBTARGET_EXTRA_SPECS
#ifndef CROSS_COMPILE
#define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp"
#else
#define LINK_SYSCALLS_SPEC ""
#endif
#ifndef CROSS_COMPILE
#define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp"
#else
#define LINK_LIBG_SPEC ""
#endif
#define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\
%{static:-bnso %(link_syscalls) } \
%{!shared:%{g*: %(link_libg) }} %{shared:-bM:SRE}"
#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
%{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc"
#define LIBGCC_SPEC "libgcc.a%s"
#define RELATIVE_PREFIX_NOT_LINKDIR
extern int target_flags;
#define MASK_POWER 0x00000001
#define MASK_POWER2 0x00000002
#define MASK_POWERPC 0x00000004
#define MASK_PPC_GPOPT 0x00000008
#define MASK_PPC_GFXOPT 0x00000010
#define MASK_POWERPC64 0x00000020
#define MASK_NEW_MNEMONICS 0x00000040
#define MASK_NO_FP_IN_TOC 0x00000080
#define MASK_NO_SUM_IN_TOC 0x00000100
#define MASK_MINIMAL_TOC 0x00000200
#define MASK_64BIT 0x00000400
#define MASK_SOFT_FLOAT 0x00000800
#define MASK_MULTIPLE 0x00001000
#define MASK_MULTIPLE_SET 0x00002000
#define MASK_STRING 0x00004000
#define MASK_STRING_SET 0x00008000
#define MASK_NO_UPDATE 0x00010000
#define MASK_NO_FUSED_MADD 0x00020000
#define MASK_NO_VRSAVE 0x00040000
#define TARGET_POWER (target_flags & MASK_POWER)
#define TARGET_POWER2 (target_flags & MASK_POWER2)
#define TARGET_POWERPC (target_flags & MASK_POWERPC)
#define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT)
#define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT)
#define TARGET_POWERPC64 (target_flags & MASK_POWERPC64)
#define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS)
#define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC)
#define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC)
#define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC)
#define TARGET_64BIT (target_flags & MASK_64BIT)
#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
#define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE)
#define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET)
#define TARGET_STRING (target_flags & MASK_STRING)
#define TARGET_STRING_SET (target_flags & MASK_STRING_SET)
#define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE)
#define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD)
#define TARGET_NO_VRSAVE (target_flags & MASK_NO_VRSAVE)
#define TARGET_32BIT (! TARGET_64BIT)
#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
#define TARGET_UPDATE (! TARGET_NO_UPDATE)
#define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD)
#define TARGET_VRSAVE (! TARGET_NO_VRSAVE)
#ifndef TARGET_ELF
#define TARGET_ELF 0
#endif
#ifndef TARGET_NO_TOC
#define TARGET_NO_TOC 0
#define TARGET_TOC 1
#endif
#ifndef TARGET_WINDOWS_NT
#define TARGET_WINDOWS_NT 0
#endif
#ifndef TARGET_MACOS
#define TARGET_MACOS 0
#endif
#ifndef TARGET_AIX
#if (TARGET_ELF || TARGET_WINDOWS_NT || TARGET_MACOS)
#define TARGET_AIX 0
#else
#define TARGET_AIX 1
#endif
#endif
#ifndef TARGET_XL_CALL
#define TARGET_XL_CALL 0
#endif
#ifndef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES
#endif
#define TARGET_SWITCHES \
{{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING}, \
{"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \
| MASK_POWER2)}, \
{"no-power2", - MASK_POWER2}, \
{"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \
| MASK_STRING)}, \
{"powerpc", MASK_POWERPC}, \
{"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \
| MASK_PPC_GFXOPT | MASK_POWERPC64)}, \
{"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \
{"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \
{"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \
{"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \
{"powerpc64", MASK_POWERPC64}, \
{"no-powerpc64", - MASK_POWERPC64}, \
{"new-mnemonics", MASK_NEW_MNEMONICS}, \
{"old-mnemonics", -MASK_NEW_MNEMONICS}, \
{"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \
| MASK_MINIMAL_TOC)}, \
{"fp-in-toc", - MASK_NO_FP_IN_TOC}, \
{"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \
{"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \
{"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \
{"minimal-toc", MASK_MINIMAL_TOC}, \
{"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \
{"no-minimal-toc", - MASK_MINIMAL_TOC}, \
{"hard-float", - MASK_SOFT_FLOAT}, \
{"soft-float", MASK_SOFT_FLOAT}, \
{"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \
{"no-multiple", - MASK_MULTIPLE}, \
{"no-multiple", MASK_MULTIPLE_SET}, \
{"string", MASK_STRING | MASK_STRING_SET}, \
{"no-string", - MASK_STRING}, \
{"no-string", MASK_STRING_SET}, \
{"update", - MASK_NO_UPDATE}, \
{"no-update", MASK_NO_UPDATE}, \
{"fused-madd", - MASK_NO_FUSED_MADD}, \
{"no-fused-madd", MASK_NO_FUSED_MADD}, \
{"vrsave", - MASK_NO_VRSAVE}, \
{"no-vrsave", MASK_NO_VRSAVE}, \
SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT}}
#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)
enum processor_type
{
PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
PROCESSOR_PPC604e,
PROCESSOR_PPC620,
PROCESSOR_PPC750
};
extern enum processor_type rs6000_cpu;
#define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)
#define PROCESSOR_COMMON PROCESSOR_PPC601
#define PROCESSOR_POWER PROCESSOR_RIOS1
#define PROCESSOR_POWERPC PROCESSOR_PPC604
#define PROCESSOR_DEFAULT PROCESSOR_RIOS1
#define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0
#ifndef SUBTARGET_OPTIONS
#define SUBTARGET_OPTIONS
#endif
#define TARGET_OPTIONS \
{ \
{"cpu=", &rs6000_select[1].string}, \
{"tune=", &rs6000_select[2].string}, \
{"debug-", &rs6000_debug_name}, \
{"debug=", &rs6000_debug_name}, \
SUBTARGET_OPTIONS \
}
struct rs6000_cpu_select
{
const char *string;
const char *name;
int set_tune_p;
int set_arch_p;
};
extern struct rs6000_cpu_select rs6000_select[];
extern const char *rs6000_debug_name;
extern int rs6000_debug_stack;
extern int rs6000_debug_arg;
#define TARGET_DEBUG_STACK rs6000_debug_stack
#define TARGET_DEBUG_ARG rs6000_debug_arg
#define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT)
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
#define CAN_DEBUG_WITHOUT_FP
#define REAL_ARITHMETIC
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
(MODE) = (! TARGET_POWERPC64 ? SImode : DImode);
#define PROMOTE_FUNCTION_ARGS
#define PROMOTE_FUNCTION_RETURN
#define BITS_BIG_ENDIAN 1
#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1
#define BITS_PER_UNIT 8
#define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64)
#define MAX_BITS_PER_WORD 64
#define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8)
#define MIN_UNITS_PER_WORD 4
#define UNITS_PER_FP_WORD 8
#define UNITS_PER_VECTOR_WORD 16
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "short unsigned int"
#define WCHAR_TYPE_SIZE 16
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64)
#define MAX_LONG_TYPE_SIZE 64
#define LONG_LONG_TYPE_SIZE 64
#define CHAR_TYPE_SIZE BITS_PER_UNIT
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define POINTER_SIZE (TARGET_32BIT ? 32 : 64)
#define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64)
#define STACK_BOUNDARY 128
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 128
#define RS6000_DOUBLE_ALIGNMENT 64
#define RS6000_LONGLONG_ALIGNMENT 64
#define RS6000_VECTOR_ALIGNMENT 128
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
(TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \
? get_inner_array_type (FIELD) \
: TREE_TYPE (FIELD)) == DFmode \
? MIN ((COMPUTED), 32) : (COMPUTED))
#define EMPTY_FIELD_BOUNDARY 32
#define STRUCTURE_SIZE_BOUNDARY 8
#define PCC_BITFIELD_TYPE_MATTERS 1
#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
((TREE_CODE (STRUCT) == RECORD_TYPE \
|| TREE_CODE (STRUCT) == UNION_TYPE \
|| TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \
&& TYPE_FIELDS (STRUCT) != 0 \
&& DECL_MODE (TYPE_FIELDS (STRUCT)) == DFmode \
? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \
: MAX ((COMPUTED), (SPECIFIED)))
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
(TREE_CODE (EXP) == STRING_CST \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define DATA_ALIGNMENT(TYPE, ALIGN) \
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define STRICT_ALIGNMENT 0
#define FIRST_PSEUDO_REGISTER 110
#ifndef FIXED_R2
#define FIXED_R2 1
#define ALLOC_R2_AS_VOLATILE
#define ALLOC_R2_AS_FIXED 2,
#endif
#ifndef FIXED_R13
#define FIXED_R13 0
#endif
#define FIXED_REGISTERS \
{0, 1, FIXED_R2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
#define CALL_USED_REGISTERS \
{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
#define REG_ALLOC_ORDER \
{32, \
45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
33, \
63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
50, 49, 48, 47, 46, \
78, 79, \
91, 90, 89, 88, 87, 86, 85, 84, 83, 82, 81, \
80, \
97, 96, 95, 94, 93, 92, \
109, 108, 107, 106, 105, 104, 103, 102, 101, 100, \
99, 98, \
75, 74, 69, 68, 72, 71, 70, \
0, ALLOC_R2_AS_VOLATILE \
9, 11, 10, 8, 7, 6, 5, 4, \
3, \
31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
18, 17, 16, 15, 14, 13, 12, \
64, 66, 65, \
73, 1, ALLOC_R2_AS_FIXED 67, 76, 77}
#define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
#define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
#define CR0_REGNO_P(N) ((N) == 68)
#define CR_REGNO_NOT_CR0_P(N) ((N) >= 69 && (N) <= 75)
#define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
#define VECTOR_REGNO_P(N) ((N) >= 78 && (N) <= 109)
#define FPMEM_REGNO_P(N) ((N) == FPMEM_REGNUM)
#define HARD_REGNO_NREGS(REGNO, MODE) \
(FP_REGNO_P (REGNO) || FPMEM_REGNO_P (REGNO) \
? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
: (VECTOR_REGNO_P (REGNO) \
? ((GET_MODE_SIZE (MODE) + UNITS_PER_VECTOR_WORD - 1) / UNITS_PER_VECTOR_WORD) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
(FP_REGNO_P (REGNO) ? \
(GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \
: VECTOR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_VECTOR \
: CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
: FPMEM_REGNO_P (REGNO) ? ((MODE) == DImode || (MODE) == DFmode) \
: ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
: 1)
#define MODES_TIEABLE_P(MODE1, MODE2) \
(GET_MODE_CLASS (MODE1) == MODE_FLOAT \
? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
: GET_MODE_CLASS (MODE2) == MODE_FLOAT \
? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
: GET_MODE_CLASS (MODE1) == MODE_CC \
? GET_MODE_CLASS (MODE2) == MODE_CC \
: GET_MODE_CLASS (MODE2) == MODE_CC \
? GET_MODE_CLASS (MODE1) == MODE_CC \
: GET_MODE_CLASS (MODE1) == MODE_VECTOR \
? GET_MODE_CLASS (MODE2) == MODE_VECTOR \
: GET_MODE_CLASS (MODE2) == MODE_VECTOR \
? GET_MODE_CLASS (MODE1) == MODE_VECTOR \
: 1)
#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
: (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
: (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
: (CLASS1) == VECTOR_REGS && (CLASS2) != VECTOR_REGS ? 40 \
: (CLASS1) != VECTOR_REGS && (CLASS2) == VECTOR_REGS ? 40 \
: (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \
|| (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \
|| (CLASS1) == LINK_OR_CTR_REGS) \
&& ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \
|| (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \
|| (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \
: 2)
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
((GET_MODE_CLASS (MODE) == MODE_FLOAT \
&& (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \
? 3 : 2) \
+ 4)
#define BRANCH_COST 3
#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
(COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST)
#define ADJUST_PRIORITY(INSN) \
INSN_PRIORITY (INSN) = rs6000_adjust_priority (INSN, INSN_PRIORITY (INSN))
#define CONDITIONAL_REGISTER_USAGE \
{ \
if (! TARGET_POWER) \
fixed_regs[64] = 1; \
if (TARGET_64BIT) \
fixed_regs[13] = call_used_regs[13] = 1; \
if (TARGET_SOFT_FLOAT) \
for (i = 32; i < 64; i++) \
fixed_regs[i] = call_used_regs[i] = 1; \
if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
&& flag_pic == 1) \
fixed_regs[PIC_OFFSET_TABLE_REGNUM] \
= call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
else if (DEFAULT_ABI == ABI_MACOSX && flag_pic) \
global_regs[PIC_OFFSET_TABLE_REGNUM] = \
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
}
#define STACK_POINTER_REGNUM 1
#ifndef FRAME_POINTER_REGNUM
#define FRAME_POINTER_REGNUM 31
#endif
#define FRAME_POINTER_REQUIRED 0
#define ARG_POINTER_REGNUM 67
#define STATIC_CHAIN_REGNUM 11
#define COUNT_REGISTER_REGNUM 66
#define FPMEM_REGNUM 76
#define STRUCT_VALUE 0
enum reg_class
{
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
NON_SPECIAL_REGS,
VECTOR_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
VRSAVE_REGS,
NON_FLOAT_REGS,
FPMEM_REGS,
FLOAT_OR_FPMEM_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES \
{ \
"NO_REGS", \
"BASE_REGS", \
"GENERAL_REGS", \
"FLOAT_REGS", \
"NON_SPECIAL_REGS", \
"VECTOR_REGS", \
"MQ_REGS", \
"LINK_REGS", \
"CTR_REGS", \
"LINK_OR_CTR_REGS", \
"SPECIAL_REGS", \
"SPEC_OR_GEN_REGS", \
"CR0_REGS", \
"CR_REGS", \
"VRSAVE_REGS", \
"NON_FLOAT_REGS", \
"FPMEM_REGS", \
"FLOAT_OR_FPMEM_REGS", \
"ALL_REGS" \
}
#define REG_CLASS_CONTENTS \
{ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, \
{ 0xfffffffe, 0x00000000, 0x00000008, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x00000008, 0x00000000 }, \
{ 0x00000000, 0xffffffff, 0x00000000, 0x00000000 }, \
{ 0xffffffff, 0xffffffff, 0x00000008, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0xffffc000, 0x00003fff }, \
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000004, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000006, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000007, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x0000000f, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000010, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00002000, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x00002fff, 0x00000000 }, \
{ 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, \
{ 0x00000000, 0xffffffff, 0x00001000, 0x00000000 }, \
{ 0xffffffff, 0xffffffff, 0xffffffff, 0x00003fff } \
}
#define REGNO_REG_CLASS(REGNO) \
((REGNO) == 0 ? GENERAL_REGS \
: (REGNO) < 32 ? BASE_REGS \
: FP_REGNO_P (REGNO) ? FLOAT_REGS \
: VECTOR_REGNO_P (REGNO) ? VECTOR_REGS \
: (REGNO) == 68 ? CR0_REGS \
: CR_REGNO_P (REGNO) ? CR_REGS \
: (REGNO) == 64 ? MQ_REGS \
: (REGNO) == 65 ? LINK_REGS \
: (REGNO) == 66 ? CTR_REGS \
: (REGNO) == 67 ? BASE_REGS \
: (REGNO) == 76 ? FPMEM_REGS \
: (REGNO) == 77 ? VRSAVE_REGS \
: NO_REGS)
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS BASE_REGS
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'f' ? FLOAT_REGS \
: (C) == 'b' ? BASE_REGS \
: (C) == 'h' ? SPECIAL_REGS \
: (C) == 'q' ? MQ_REGS \
: (C) == 'c' ? CTR_REGS \
: (C) == 'l' ? LINK_REGS \
: (C) == 'v' ? VECTOR_REGS \
: (C) == 'x' ? CR0_REGS \
: (C) == 'y' ? CR_REGS \
: (C) == 'z' ? FPMEM_REGS \
: NO_REGS)
#define EXTRA_CONSTANT_CONSTRAINTS
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
( (C) == 'A' ? (unsigned HOST_WIDE_INT) ((VALUE) + 16) < 32 \
: (C) == 'B' ? (unsigned HOST_WIDE_INT) (VALUE) < 32 \
: (C) == 'C' ? (unsigned HOST_WIDE_INT) (VALUE) < 16 \
: (C) == 'D' ? (unsigned HOST_WIDE_INT) (VALUE) < 4 \
: (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
: (C) == 'J' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0 \
: (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \
: (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
&& ((VALUE) >> 31 == -1 || (VALUE) >> 31 == 0)) \
: (C) == 'M' ? (VALUE) > 31 \
: (C) == 'N' ? exact_log2 (VALUE) >= 0 \
: (C) == 'O' ? (VALUE) == 0 \
: (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x10000 \
: 0)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
( (C) == 'G' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) \
== ((GET_MODE (VALUE) == SFmode) ? 1 : 2)) \
: (C) == 'H' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) == 3) \
: 0)
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
: (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \
: (C) == 'S' ? mask64_operand (OP, VOIDmode) \
: (C) == 'T' ? mask_operand (OP, VOIDmode) \
: (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
&& small_data_operand (OP, GET_MODE (OP))) \
: 0)
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
((GET_CODE (X) == CONST_DOUBLE \
&& GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
? NO_REGS : (CLASS))
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
secondary_reload_class (CLASS, MODE, IN)
#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS))
#define CLASS_MAX_NREGS(CLASS, MODE) \
(((CLASS) == FLOAT_REGS || (CLASS) == FPMEM_REGS \
|| (CLASS) == FLOAT_OR_FPMEM_REGS) \
? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
#define CLASS_CANNOT_CHANGE_SIZE FLOAT_OR_FPMEM_REGS
enum rs6000_abi {
ABI_NONE,
ABI_AIX,
ABI_AIX_NODESC,
ABI_MACOSX,
ABI_V4,
ABI_NT,
ABI_SOLARIS
};
extern enum rs6000_abi rs6000_current_abi;
#ifndef DEFAULT_ABI
#define DEFAULT_ABI ABI_AIX
#define USER_LABEL_PREFIX "."
#endif
typedef struct rs6000_stack {
int first_gp_reg_save;
int first_fp_reg_save;
int first_vector_reg_save;
int lr_save_p;
int cr_save_p;
int vrsave_save_p;
int toc_save_p;
int push_p;
int calls_p;
int main_p;
int main_save_p;
int fpmem_p;
int vector_outside_red_zone_p;
int world_save_p;
enum rs6000_abi abi;
int gp_save_offset;
int fp_save_offset;
int vector_save_offset;
int lr_save_offset;
int cr_save_offset;
int vrsave_save_offset;
int toc_save_offset;
int varargs_save_offset;
int main_save_offset;
int fpmem_offset;
int reg_size;
int varargs_size;
int vars_size;
int parm_size;
int main_size;
int save_size;
int fixed_size;
int gp_size;
int fp_size;
int vector_size;
int cr_size;
int vrsave_size;
int lr_size;
int fpmem_size;
int toc_size;
int align_size;
int total_size;
} rs6000_stack_t;
#define STACK_GROWS_DOWNWARD
#define RS6000_REG_SAVE (TARGET_32BIT ? 32 : 64)
#define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48)
#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \
plus_constant (stack_pointer_rtx, \
(TARGET_32BIT ? 20 : 40)))
extern int rs6000_fpmem_offset;
extern int rs6000_fpmem_size;
#define RS6000_VARARGS_AREA 0
extern int rs6000_sysv_varargs_p;
#define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1))
#define INIT_EXPANDERS rs6000_init_expanders ()
#define RS6000_VARARGS_SIZE \
((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8 + 8)
#define STARTING_FRAME_OFFSET \
(RS6000_ALIGN (current_function_outgoing_args_size, 16) \
+ RS6000_VARARGS_AREA \
+ RS6000_SAVE_AREA)
#define STACK_DYNAMIC_OFFSET(FUNDECL) \
(RS6000_ALIGN (current_function_outgoing_args_size, 16) \
+ (STACK_POINTER_OFFSET))
extern int rs6000_inlining;
#define BEGIN_EXPAND_INLINE_FUNCTION() rs6000_inlining++
#define END_EXPAND_INLINE_FUNCTION() rs6000_inlining--
#define FRAME_ALIGN_MOD(a,o,s) ((a) == 16 && !((o) == 0 && (s) == 0) && !rs6000_inlining ? 8 : 0)
#define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA
#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE
#define NO_REG_PARM_STACK_SPACE(CUM,ENTRY) \
no_reg_parm_stack_space(&CUM, ENTRY)
#define OUTGOING_REG_PARM_STACK_SPACE
#define STACK_POINTER_OFFSET RS6000_SAVE_AREA
#define ACCUMULATE_OUTGOING_ARGS
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
|| POINTER_TYPE_P (VALTYPE) \
? word_mode : TYPE_MODE (VALTYPE), \
TREE_CODE (VALTYPE) == VECTOR_TYPE ? VECTOR_ARG_RETURN \
: TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT \
? FP_ARG_RETURN : GP_ARG_RETURN)
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (MODE, \
GET_MODE_CLASS (MODE) == MODE_VECTOR ? VECTOR_ARG_RETURN \
: GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT \
? FP_ARG_RETURN : GP_ARG_RETURN)
#define RETURN_IN_MEMORY(TYPE) \
(TYPE_MODE (TYPE) == BLKmode \
&& (DEFAULT_ABI != ABI_SOLARIS || int_size_in_bytes (TYPE) > 8))
#define STACK_SAVEAREA_MODE(LEVEL) \
(LEVEL == SAVE_FUNCTION ? VOIDmode \
: LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode)
#define GP_ARG_MIN_REG 3
#define GP_ARG_MAX_REG 10
#define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1)
#define FP_ARG_MIN_REG 33
#define FP_ARG_AIX_MAX_REG 45
#define FP_ARG_V4_MAX_REG 40
#define FP_ARG_MAX_REG FP_ARG_AIX_MAX_REG
#define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1)
#define VECTOR_ARG_MIN_REG 80
#define VECTOR_ARG_MAX_REG 91
#define VECTOR_ARG_NUM_REG (VECTOR_ARG_MAX_REG - VECTOR_ARG_MIN_REG + 1)
#define GP_ARG_RETURN GP_ARG_MIN_REG
#define FP_ARG_RETURN FP_ARG_MIN_REG
#define VECTOR_ARG_RETURN VECTOR_ARG_MIN_REG
#define CALL_NORMAL 0x00000000
#define CALL_NT_DLLIMPORT 0x00000001
#define CALL_V4_CLEAR_FP_ARGS 0x00000002
#define CALL_V4_SET_FP_ARGS 0x00000004
#define CALL_LONG 0x00000008
#define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63)
#define VECTOR_SAVE_INLINE(FIRST_REG) ((FIRST_REG) >= 108 && (FIRST_REG) <= 109)
#define FUNCTION_VALUE_REGNO_P(N) \
((N) == GP_ARG_RETURN || ((N) == FP_ARG_RETURN) || ((N) == VECTOR_ARG_RETURN))
#define FUNCTION_ARG_REGNO_P(N) \
(((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \
|| ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG)) \
|| ((unsigned)((N) - VECTOR_ARG_MIN_REG) < (unsigned)(VECTOR_ARG_NUM_REG)))
typedef struct rs6000_args
{
int words;
int fregno;
int nargs_prototype;
int orig_nargs;
int prototype;
int call_cookie;
int sysv_gregno;
int vregno;
int num_vector;
int is_incoming;
int is_varargs;
} CUMULATIVE_ARGS;
#define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
(! (NAMED) ? 0 \
: (MODE) != BLKmode \
? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
: (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE)
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \
init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE)
#define REARRANGE_ARG_LIST(CUM,ARGS) \
rearrange_arg_list(&CUM, ARGS)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
function_arg_advance (&CUM, MODE, TYPE, NAMED)
#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
(GET_MODE_CLASS (MODE) == MODE_FLOAT \
&& (CUM).fregno <= FP_ARG_MAX_REG \
&& TARGET_HARD_FLOAT)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
(enum direction) function_arg_padding (MODE, TYPE)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
function_arg_boundary (MODE, TYPE)
#define FUNCTION_ARG_MOD_BOUNDARY(MODE, TYPE) \
function_arg_mod_boundary (MODE, TYPE)
#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
#define EXPAND_BUILTIN_SAVEREGS(ARGS) \
expand_builtin_saveregs (ARGS)
#define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
#define FUNCTION_PROFILER(FILE, LABELNO) \
output_function_profiler ((FILE), (LABELNO));
#define EXIT_IGNORE_STACK 1
#define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
#if TARGET_ELF || defined(MACHO_PIC)
#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION)
#endif
#define TRAMPOLINE_SIZE rs6000_trampoline_size ()
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
rs6000_initialize_trampoline (ADDR, FNADDR, CXT)
#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
(rs6000_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
#define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
(rs6000_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
#define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
(rs6000_comp_type_attributes (TYPE1, TYPE2))
#define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
(rs6000_set_default_type_attributes (TYPE))
#define RETURN_ADDRESS_OFFSET \
((DEFAULT_ABI == ABI_AIX \
|| DEFAULT_ABI == ABI_MACOSX \
|| DEFAULT_ABI == ABI_AIX_NODESC) ? 8 : \
(DEFAULT_ABI == ABI_V4 \
|| DEFAULT_ABI == ABI_SOLARIS) ? (TARGET_32BIT ? 4 : 8) : \
(DEFAULT_ABI == ABI_NT) ? -4 : \
(fatal ("RETURN_ADDRESS_OFFSET not supported"), 0))
#define RETURN_ADDR_RTX(count, frame) \
((count == -1) \
? gen_rtx_REG (Pmode, 65) \
: gen_rtx_MEM (Pmode, \
memory_address (Pmode, \
plus_constant (copy_to_reg (gen_rtx_MEM (Pmode, \
memory_address (Pmode, frame))), \
RETURN_ADDRESS_OFFSET))))
#define ELIMINABLE_REGS \
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ 30, 30} }
#define CAN_ELIMINATE(FROM, TO) \
((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
? ! frame_pointer_needed \
: (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \
: 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
{ \
rs6000_stack_t *info = rs6000_stack_info (); \
\
if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
(OFFSET) = (info->push_p) ? 0 : - info->total_size; \
else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
(OFFSET) = info->total_size; \
else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
(OFFSET) = (info->push_p) ? info->total_size : 0; \
else if ((FROM) == 30) \
(OFFSET) = 0; \
else \
abort (); \
}
#define HAVE_PRE_DECREMENT 1
#define HAVE_PRE_INCREMENT 1
#define REGNO_OK_FOR_INDEX_P(REGNO) \
((REGNO) < FIRST_PSEUDO_REGISTER \
? (REGNO) <= 31 || (REGNO) == 67 \
: (reg_renumber[REGNO] >= 0 \
&& (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < FIRST_PSEUDO_REGISTER \
? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
: (reg_renumber[REGNO] > 0 \
&& (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
#define MAX_REGS_PER_ADDRESS 2
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|| GET_CODE (X) == HIGH)
#define LEGITIMATE_CONSTANT_P(X) \
(GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
|| (TARGET_POWERPC64 && GET_MODE (X) == DImode) \
|| easy_fp_constant (X, GET_MODE (X)))
#ifndef REG_OK_STRICT
#define REG_OK_FOR_INDEX_P(X) \
(REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
#define REG_OK_FOR_BASE_P(X) \
(REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
#else
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
#define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
(TARGET_TOC && GET_CODE (X) == SYMBOL_REF \
&& CONSTANT_POOL_ADDRESS_P (X) \
&& ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
#define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
(LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
|| (TARGET_TOC \
&& GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
&& LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
#define LEGITIMATE_SMALL_DATA_P(MODE, X) \
((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
&& !flag_pic && !TARGET_TOC \
&& (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \
&& small_data_operand (X, MODE))
#define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
(GET_CODE (X) == CONST_INT \
&& (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
(GET_CODE (X) == PLUS \
&& GET_CODE (XEXP (X, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
&& LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
&& ((MODE) != SVmode || INTVAL (X) == 0) \
&& (((MODE) != DFmode && (MODE) != DImode) \
|| (TARGET_32BIT \
? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \
: ! (INTVAL (XEXP (X, 1)) & 3))) \
&& ((MODE) != TImode \
|| (TARGET_32BIT \
? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \
: (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \
&& ! (INTVAL (XEXP (X, 1)) & 3)))))
#define LEGITIMATE_INDEXED_ADDRESS_P(X) \
(GET_CODE (X) == PLUS \
&& GET_CODE (XEXP (X, 0)) == REG \
&& GET_CODE (XEXP (X, 1)) == REG \
&& ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
&& REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
|| (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
&& REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
#define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
(GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
((TARGET_ELF || DEFAULT_ABI == ABI_MACOSX) \
&& !flag_pic && !TARGET_TOC \
&& (MODE) != SVmode \
&& (MODE) != DImode \
&& (MODE) != TImode \
&& (TARGET_HARD_FLOAT || (MODE) != DFmode) \
&& GET_CODE (X) == LO_SUM \
&& GET_CODE (XEXP (X, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
&& CONSTANT_P (XEXP (X, 1)))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
goto ADDR; \
if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
&& TARGET_UPDATE \
&& LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
goto ADDR; \
if (LEGITIMATE_SMALL_DATA_P (MODE, X)) \
goto ADDR; \
if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
goto ADDR; \
if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
goto ADDR; \
if ((MODE) != TImode \
&& (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \
&& (TARGET_POWERPC64 || (MODE) != DImode) \
&& LEGITIMATE_INDEXED_ADDRESS_P (X)) \
goto ADDR; \
if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X)) \
goto ADDR; \
}
extern struct rtx_def *legitimize_pic_address ();
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
{ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
&& GET_CODE (XEXP (X, 1)) == CONST_INT \
&& (unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
{ HOST_WIDE_INT high_int, low_int; \
rtx sum; \
high_int = INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff); \
low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
if (low_int & 0x8000) \
high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \
sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \
GEN_INT (high_int)), 0); \
(X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \
goto WIN; \
} \
else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
&& GET_CODE (XEXP (X, 1)) != CONST_INT \
&& (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \
&& (TARGET_POWERPC64 || (MODE) != DImode) \
&& (MODE) != TImode) \
{ \
(X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \
goto WIN; \
} \
else if ((TARGET_ELF || DEFAULT_ABI == ABI_MACOSX) && TARGET_32BIT && TARGET_NO_TOC \
&& !flag_pic \
&& GET_CODE (X) != CONST_INT \
&& GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X) \
&& (TARGET_HARD_FLOAT || (MODE) != DFmode) \
&& (MODE) != DImode && (MODE) != TImode) \
{ \
rtx reg = gen_reg_rtx (Pmode); \
emit_insn (gen_elf_high (reg, (X))); \
(X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \
if ((MODE) == SVmode) \
(X) = force_reg (Pmode, (X)); \
goto WIN; \
} \
else if (GET_CODE (X) == PLUS && (MODE) == SVmode) \
{ \
(X) = force_operand ((X), NULL_RTX); \
goto WIN; \
} \
}
#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \
do { \
\
if (GET_CODE (X) == PLUS \
&& GET_CODE (XEXP (X, 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
&& GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
&& GET_CODE (XEXP (X, 1)) == CONST_INT) \
{ \
push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
} \
if (GET_CODE (X) == PLUS && (MODE) == SVmode) \
{ \
rtx orig_X = X; \
X = copy_rtx (X); \
push_reload (orig_X, NULL_RTX, &X, NULL_PTR, \
BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
} \
if (GET_CODE (X) == PLUS \
&& GET_CODE (XEXP (X, 0)) == REG \
&& REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \
&& REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \
&& GET_CODE (XEXP (X, 1)) == CONST_INT) \
{ \
HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; \
HOST_WIDE_INT high \
= (((val - low) & 0xffffffff) ^ 0x80000000) - 0x80000000; \
\
\
if (high + low != val) \
break; \
\
\
\
X = gen_rtx_PLUS (GET_MODE (X), \
gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \
GEN_INT (high)), \
GEN_INT (low)); \
\
push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
} \
} while (0)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
{ if (GET_CODE (ADDR) == PLUS \
&& LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
&& ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \
(TARGET_32BIT ? 4 : 8))) \
goto LABEL; \
if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_INC) \
goto LABEL; \
if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_DEC) \
goto LABEL; \
if (GET_CODE (ADDR) == LO_SUM) \
goto LABEL; \
}
#ifndef PIC_OFFSET_TABLE_REGNUM
#define PIC_OFFSET_TABLE_REGNUM 30
#endif
#define MACHINE_DEPENDENT_REORG(INSN) rs6000_reorg (INSN)
#define CASE_VECTOR_MODE (TARGET_32BIT ? SImode : DImode)
#define CASE_VECTOR_PC_RELATIVE 1
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
#define EASY_DIV_EXPR TRUNC_DIV_EXPR
#define DEFAULT_SIGNED_CHAR 0
#define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8)
#define MAX_MOVE_MAX 8
#define SLOW_BYTE_ACCESS 1
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
#define SHORT_IMMEDIATES_SIGN_EXTEND
#define XCOFF_DEBUGGING_INFO
#define OBJECT_FORMAT_COFF
#define MY_ISCOFF(magic) \
((magic) == U802WRMAGIC || (magic) == U802ROMAGIC \
|| (magic) == U802TOCMAGIC || (magic) == 0757 || (magic) == 0x2321)
#define REAL_NM_FILE_NAME "/usr/ucb/nm"
#define FASCIST_ASSEMBLER
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define Pmode (TARGET_32BIT ? SImode : DImode)
#define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode)
#define NO_FUNCTION_CSE
#define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0)
#define HAVE_ATEXIT
#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
case CONST_INT: \
case CONST: \
case LABEL_REF: \
case SYMBOL_REF: \
case CONST_DOUBLE: \
case HIGH: \
return 0;
#define RTX_COSTS(X,CODE,OUTER_CODE) \
case PLUS: \
return ((GET_CODE (XEXP (X, 1)) == CONST_INT \
&& ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) \
+ 0x8000) >= 0x10000) \
&& ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \
? COSTS_N_INSNS (2) \
: COSTS_N_INSNS (1)); \
case AND: \
case IOR: \
case XOR: \
return ((GET_CODE (XEXP (X, 1)) == CONST_INT \
&& (INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff)) != 0 \
&& ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \
? COSTS_N_INSNS (2) \
: COSTS_N_INSNS (1)); \
case MULT: \
switch (rs6000_cpu) \
{ \
case PROCESSOR_RIOS1: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? COSTS_N_INSNS (5) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
case PROCESSOR_RIOS2: \
case PROCESSOR_MPCCORE: \
case PROCESSOR_PPC604e: \
return COSTS_N_INSNS (2); \
case PROCESSOR_PPC601: \
return COSTS_N_INSNS (5); \
case PROCESSOR_PPC603: \
case PROCESSOR_PPC750: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? COSTS_N_INSNS (5) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \
case PROCESSOR_PPC403: \
case PROCESSOR_PPC604: \
case PROCESSOR_PPC620: \
return COSTS_N_INSNS (4); \
} \
case DIV: \
case MOD: \
if (GET_CODE (XEXP (X, 1)) == CONST_INT \
&& exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
return COSTS_N_INSNS (2); \
\
case UDIV: \
case UMOD: \
switch (rs6000_cpu) \
{ \
case PROCESSOR_RIOS1: \
return COSTS_N_INSNS (19); \
case PROCESSOR_RIOS2: \
return COSTS_N_INSNS (13); \
case PROCESSOR_MPCCORE: \
return COSTS_N_INSNS (6); \
case PROCESSOR_PPC403: \
return COSTS_N_INSNS (33); \
case PROCESSOR_PPC601: \
return COSTS_N_INSNS (36); \
case PROCESSOR_PPC603: \
return COSTS_N_INSNS (37); \
case PROCESSOR_PPC604: \
case PROCESSOR_PPC604e: \
case PROCESSOR_PPC620: \
return COSTS_N_INSNS (20); \
case PROCESSOR_PPC750: \
return COSTS_N_INSNS (19); \
} \
case FFS: \
return COSTS_N_INSNS (4); \
case MEM: \
\
return 5;
#define ADDRESS_COST(RTX) 0
#define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
#define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
#define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
: (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
: (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
? CCEQmode : CCmode))
extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
extern int rs6000_compare_fp_p;
extern int rs6000_trunc_used;
#define RS6000_ITRUNC "__itrunc"
#define RS6000_UITRUNC "__uitrunc"
#ifndef SAVE_FP_PREFIX
#define SAVE_FP_PREFIX "._savef"
#define SAVE_FP_SUFFIX ""
#endif
#ifndef RESTORE_FP_PREFIX
#define RESTORE_FP_PREFIX "._restf"
#define RESTORE_FP_SUFFIX ""
#endif
#ifndef SAVE_VECTOR_PREFIX
#define SAVE_VECTOR_PREFIX "._savev"
#define SAVE_VECTOR_SUFFIX ""
#endif
#ifndef RESTORE_VECTOR_PREFIX
#define RESTORE_VECTOR_PREFIX "._restv"
#define RESTORE_VECTOR_SUFFIX ""
#endif
#define RS6000_MCOUNT ".__mcount"
#define ASM_COMMENT_START " #"
#define ASM_FILE_START(FILE) \
{ \
rs6000_gen_section_name (&xcoff_bss_section_name, \
main_input_filename, ".bss_"); \
rs6000_gen_section_name (&xcoff_private_data_section_name, \
main_input_filename, ".rw_"); \
rs6000_gen_section_name (&xcoff_read_only_section_name, \
main_input_filename, ".ro_"); \
\
fprintf (FILE, "\t.file\t\"%s\"\n", main_input_filename); \
if (TARGET_64BIT) \
fputs ("\t.machine\t\"ppc64\"\n", FILE); \
toc_section (); \
if (write_symbols != NO_DEBUG) \
private_data_section (); \
text_section (); \
if (profile_flag) \
fprintf (FILE, "\t.extern %s\n", RS6000_MCOUNT); \
rs6000_file_start (FILE, TARGET_CPU_DEFAULT); \
}
#define ASM_FILE_END(FILE) \
{ \
text_section (); \
fputs ("_section_.text:\n", FILE); \
data_section (); \
fputs ("\t.long _section_.text\n", FILE); \
}
#define NO_DOLLAR_IN_LABEL
#define DOLLARS_IN_IDENTIFIERS 0
#define TARGET_MEM_FUNCTIONS
#define EXTRA_SECTIONS \
read_only_data, private_data, read_only_private_data, toc, bss
#define READONLY_DATA_SECTION read_only_data_section
#define EXCEPTION_SECTION data_section
#define ENCODE_SECTION_INFO(DECL) \
if (TREE_CODE (DECL) == FUNCTION_DECL \
&& (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL)) \
&& !DECL_WEAK (DECL)) \
SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
#define JUMP_TABLES_IN_TEXT_SECTION 1
#define EXTRA_SECTION_FUNCTIONS \
\
void \
read_only_data_section () \
{ \
if (in_section != read_only_data) \
{ \
fprintf (asm_out_file, ".csect %s[RO],3\n", \
xcoff_read_only_section_name); \
in_section = read_only_data; \
} \
} \
\
void \
private_data_section () \
{ \
if (in_section != private_data) \
{ \
fprintf (asm_out_file, ".csect %s[RW],3\n", \
xcoff_private_data_section_name); \
in_section = private_data; \
} \
} \
\
void \
read_only_private_data_section () \
{ \
if (in_section != read_only_private_data) \
{ \
fprintf (asm_out_file, ".csect %s[RO],3\n", \
xcoff_private_data_section_name); \
in_section = read_only_private_data; \
} \
} \
\
void \
toc_section () \
{ \
if (TARGET_MINIMAL_TOC) \
{ \
\
if (! toc_initialized) \
{ \
fputs (".toc\nLCTOC..0:\n", asm_out_file); \
fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \
toc_initialized = 1; \
} \
\
if (in_section != toc) \
fprintf (asm_out_file, ".csect toc_table[RW]%s\n", \
(TARGET_32BIT ? "" : ",3")); \
} \
else \
{ \
if (in_section != toc) \
fputs (".toc\n", asm_out_file); \
} \
in_section = toc; \
}
extern int toc_initialized;
#define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
{ if (TREE_PUBLIC (DECL)) \
{ \
fputs ("\t.globl .", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
putc ('\n', FILE); \
} \
else \
{ \
fputs ("\t.lglobl .", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
putc ('\n', FILE); \
} \
fputs (".csect ", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (TARGET_32BIT ? "[DS]\n" : "[DS],3\n", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (":\n", FILE); \
fputs (TARGET_32BIT ? "\t.long ." : "\t.llong .", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (", TOC[tc0], 0\n", FILE); \
fputs (".csect .text[PR]\n.", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (":\n", FILE); \
if (write_symbols == XCOFF_DEBUG) \
xcoffout_declare_function (FILE, DECL, NAME); \
}
#define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
(TARGET_TOC \
&& (GET_CODE (X) == SYMBOL_REF \
|| (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
|| GET_CODE (X) == LABEL_REF \
|| (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \
&& GET_CODE (X) == CONST_DOUBLE \
&& (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
|| (TARGET_POWERPC64 && GET_MODE (X) == DImode)))))
#if 0
&& BITS_PER_WORD == HOST_BITS_PER_INT)))
#endif
#define SELECT_RTX_SECTION(MODE, X) \
{ if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
toc_section (); \
else \
read_only_private_data_section (); \
}
#define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
{ if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
{ \
output_toc (FILE, X, LABELNO); \
goto WIN; \
} \
}
#define SELECT_SECTION(EXP,RELOC) \
{ \
if ((TREE_CODE (EXP) == STRING_CST \
&& !flag_writable_strings) \
|| (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \
&& TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \
&& DECL_INITIAL (EXP) \
&& (DECL_INITIAL (EXP) == error_mark_node \
|| TREE_CONSTANT (DECL_INITIAL (EXP))) \
&& ! (RELOC))) \
{ \
if (TREE_PUBLIC (EXP)) \
read_only_data_section (); \
else \
read_only_private_data_section (); \
} \
else \
{ \
if (TREE_PUBLIC (EXP)) \
data_section (); \
else \
private_data_section (); \
} \
}
#define RS6000_OUTPUT_BASENAME(FILE, NAME) \
{ \
char *_p; \
\
STRIP_NAME_ENCODING (_p, (NAME)); \
assemble_name ((FILE), _p); \
}
#define STRIP_NAME_ENCODING(VAR,NAME) \
do \
{ \
char *_name = (NAME); \
int _len; \
if (_name[0] == '*') \
_name++; \
_len = strlen (_name); \
if (_name[_len - 1] != ']') \
(VAR) = _name; \
else \
{ \
(VAR) = (char *) alloca (_len + 1); \
strcpy ((VAR), _name); \
(VAR)[_len - 4] = '\0'; \
} \
} \
while (0)
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
{ rtx _symref = XEXP (DECL_RTL (DECL), 0); \
if ((TREE_CODE (DECL) == VAR_DECL \
|| TREE_CODE (DECL) == FUNCTION_DECL) \
&& (NAME)[strlen (NAME) - 1] != ']') \
{ \
char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
strcpy (_name, XSTR (_symref, 0)); \
strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
XSTR (_symref, 0) = _name; \
} \
fputs ("\t.extern ", FILE); \
assemble_name (FILE, XSTR (_symref, 0)); \
if (TREE_CODE (DECL) == FUNCTION_DECL) \
{ \
fputs ("\n\t.extern .", FILE); \
RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
} \
putc ('\n', FILE); \
}
#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
{ fputs ("\t.extern .", FILE); \
assemble_name (FILE, XSTR (FUN, 0)); \
putc ('\n', FILE); \
}
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
#define TEXT_SECTION_ASM_OP (TARGET_32BIT \
? ".csect .text[PR]" : ".csect .text[PR],3")
#define DATA_SECTION_ASM_OP ".csect .data[RW],3"
extern char rs6000_reg_names[][8];
#define REGISTER_NAMES \
{ \
&rs6000_reg_names[ 0][0], \
&rs6000_reg_names[ 1][0], \
&rs6000_reg_names[ 2][0], \
&rs6000_reg_names[ 3][0], \
&rs6000_reg_names[ 4][0], \
&rs6000_reg_names[ 5][0], \
&rs6000_reg_names[ 6][0], \
&rs6000_reg_names[ 7][0], \
&rs6000_reg_names[ 8][0], \
&rs6000_reg_names[ 9][0], \
&rs6000_reg_names[10][0], \
&rs6000_reg_names[11][0], \
&rs6000_reg_names[12][0], \
&rs6000_reg_names[13][0], \
&rs6000_reg_names[14][0], \
&rs6000_reg_names[15][0], \
&rs6000_reg_names[16][0], \
&rs6000_reg_names[17][0], \
&rs6000_reg_names[18][0], \
&rs6000_reg_names[19][0], \
&rs6000_reg_names[20][0], \
&rs6000_reg_names[21][0], \
&rs6000_reg_names[22][0], \
&rs6000_reg_names[23][0], \
&rs6000_reg_names[24][0], \
&rs6000_reg_names[25][0], \
&rs6000_reg_names[26][0], \
&rs6000_reg_names[27][0], \
&rs6000_reg_names[28][0], \
&rs6000_reg_names[29][0], \
&rs6000_reg_names[30][0], \
&rs6000_reg_names[31][0], \
\
&rs6000_reg_names[32][0], \
&rs6000_reg_names[33][0], \
&rs6000_reg_names[34][0], \
&rs6000_reg_names[35][0], \
&rs6000_reg_names[36][0], \
&rs6000_reg_names[37][0], \
&rs6000_reg_names[38][0], \
&rs6000_reg_names[39][0], \
&rs6000_reg_names[40][0], \
&rs6000_reg_names[41][0], \
&rs6000_reg_names[42][0], \
&rs6000_reg_names[43][0], \
&rs6000_reg_names[44][0], \
&rs6000_reg_names[45][0], \
&rs6000_reg_names[46][0], \
&rs6000_reg_names[47][0], \
&rs6000_reg_names[48][0], \
&rs6000_reg_names[49][0], \
&rs6000_reg_names[50][0], \
&rs6000_reg_names[51][0], \
&rs6000_reg_names[52][0], \
&rs6000_reg_names[53][0], \
&rs6000_reg_names[54][0], \
&rs6000_reg_names[55][0], \
&rs6000_reg_names[56][0], \
&rs6000_reg_names[57][0], \
&rs6000_reg_names[58][0], \
&rs6000_reg_names[59][0], \
&rs6000_reg_names[60][0], \
&rs6000_reg_names[61][0], \
&rs6000_reg_names[62][0], \
&rs6000_reg_names[63][0], \
\
&rs6000_reg_names[64][0], \
&rs6000_reg_names[65][0], \
&rs6000_reg_names[66][0], \
&rs6000_reg_names[67][0], \
\
&rs6000_reg_names[68][0], \
&rs6000_reg_names[69][0], \
&rs6000_reg_names[70][0], \
&rs6000_reg_names[71][0], \
&rs6000_reg_names[72][0], \
&rs6000_reg_names[73][0], \
&rs6000_reg_names[74][0], \
&rs6000_reg_names[75][0], \
\
&rs6000_reg_names[76][0], \
\
&rs6000_reg_names[77][0], \
\
&rs6000_reg_names[78][0], \
&rs6000_reg_names[79][0], \
&rs6000_reg_names[80][0], \
&rs6000_reg_names[81][0], \
&rs6000_reg_names[82][0], \
&rs6000_reg_names[83][0], \
&rs6000_reg_names[84][0], \
&rs6000_reg_names[85][0], \
&rs6000_reg_names[86][0], \
&rs6000_reg_names[87][0], \
&rs6000_reg_names[88][0], \
&rs6000_reg_names[89][0], \
&rs6000_reg_names[90][0], \
&rs6000_reg_names[91][0], \
&rs6000_reg_names[92][0], \
&rs6000_reg_names[93][0], \
&rs6000_reg_names[94][0], \
&rs6000_reg_names[95][0], \
&rs6000_reg_names[96][0], \
&rs6000_reg_names[97][0], \
&rs6000_reg_names[98][0], \
&rs6000_reg_names[99][0], \
&rs6000_reg_names[100][0], \
&rs6000_reg_names[101][0], \
&rs6000_reg_names[102][0], \
&rs6000_reg_names[103][0], \
&rs6000_reg_names[104][0], \
&rs6000_reg_names[105][0], \
&rs6000_reg_names[106][0], \
&rs6000_reg_names[107][0], \
&rs6000_reg_names[108][0], \
&rs6000_reg_names[109][0], \
}
#define DEBUG_REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
"mq", "lr", "ctr", "ap", \
"cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
"fpmem", "vrsave", \
"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \
"v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \
"v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \
"v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31" \
}
#define ADDITIONAL_REGISTER_NAMES \
{{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \
{"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \
{"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \
{"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \
{"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \
{"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \
{"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \
{"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \
{"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \
{"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \
{"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \
{"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \
{"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \
{"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \
{"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \
{"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \
{"v0", 78}, {"v1", 79}, {"v2", 80}, {"v3", 81}, \
{"v4", 82}, {"v5", 83}, {"v6", 84}, {"v7", 85}, \
{"v8", 86}, {"v9", 87}, {"v10", 88}, {"v11", 89}, \
{"v12", 90}, {"v13", 91}, {"v14", 92}, {"v15", 93}, \
{"v16", 94}, {"v17", 95}, {"v18", 96}, {"v19", 97}, \
{"v20", 98}, {"v21", 99}, {"v22", 100}, {"v23", 101}, \
{"v24", 102}, {"v25", 103}, {"v26", 104}, {"v27", 105}, \
{"v28", 106}, {"v29", 107}, {"v30", 108}, {"v31", 109}, \
\
{"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \
{"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \
{"cc", 68}, {"sp", 1}, {"toc", 2} }
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
#define RS6000_CALL_GLUE "cror 31,31,31"
#define ASM_OUTPUT_LABEL(FILE,NAME) \
do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
do { fputs ("\t.globl ", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
#define ASM_OUTPUT_LABELREF(FILE,NAME) \
fputs (NAME, FILE)
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
#define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \
fprintf (FILE, "%s..", PREFIX)
#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%s..%d", PREFIX, NUM)
#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
{ \
long t[2]; \
REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \
t[0] & 0xffffffff, t[1] & 0xffffffff); \
}
#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
{ \
long t; \
REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
}
#define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
do { \
if (TARGET_32BIT) \
{ \
assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \
UNITS_PER_WORD, 1); \
assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \
UNITS_PER_WORD, 1); \
} \
else \
{ \
fputs ("\t.llong ", FILE); \
output_addr_const (FILE, (VALUE)); \
putc ('\n', FILE); \
} \
} while (0)
#define ASM_OUTPUT_INT(FILE,VALUE) \
( fputs ("\t.long ", FILE), \
output_addr_const (FILE, (VALUE)), \
putc ('\n', FILE))
#define ASM_OUTPUT_SHORT(FILE,VALUE) \
( fputs ("\t.short ", FILE), \
output_addr_const (FILE, (VALUE)), \
putc ('\n', FILE))
#define ASM_OUTPUT_CHAR(FILE,VALUE) \
( fputs ("\t.byte ", FILE), \
output_addr_const (FILE, (VALUE)), \
putc ('\n', FILE))
#define ASM_OUTPUT_BYTE(FILE,VALUE) \
fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
#define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
do { char buf[100]; \
fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
assemble_name (FILE, buf); \
putc ('\n', FILE); \
} while (0)
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\
do { char buf[100]; \
fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
assemble_name (FILE, buf); \
putc ('-', FILE); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \
assemble_name (FILE, buf); \
putc ('\n', FILE); \
} while (0)
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG) != 0) \
fprintf (FILE, "\t.align %d\n", (LOG))
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\t.space %d\n", (SIZE))
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNMENT) \
do { fputs (".comm ", (FILE)); \
RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
if ( (ALIGNMENT) >= 128) \
fprintf ((FILE), ",%d,4\n", (SIZE)); \
else if ( (SIZE) > 4) \
fprintf ((FILE), ",%d,3\n", (SIZE)); \
else \
fprintf( (FILE), ",%d\n", (SIZE)); \
} while (0)
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
do { fputs (".lcomm ", (FILE)); \
RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
fprintf ((FILE), ",%d,%s\n", (TARGET_32BIT ? (SIZE) : (ROUNDED)), \
xcoff_bss_section_name); \
} while (0)
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
#define ASM_OPEN_PAREN "("
#define ASM_CLOSE_PAREN ")"
#define TARGET_BELL 007
#define TARGET_BS 010
#define TARGET_TAB 011
#define TARGET_NEWLINE 012
#define TARGET_VT 013
#define TARGET_FF 014
#define TARGET_CR 015
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '.' || (CODE) == '*' || (CODE) == '$')
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
#define PREDICATE_CODES \
{"zero_m1_operand", {CONST_INT}}, \
{"short_cint_operand", {CONST_INT}}, \
{"u_short_cint_operand", {CONST_INT}}, \
{"non_short_cint_operand", {CONST_INT}}, \
{"gpc_reg_operand", {SUBREG, REG}}, \
{"cc_reg_operand", {SUBREG, REG}}, \
{"cc_reg_not_cr0_operand", {SUBREG, REG}}, \
{"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
{"easy_fp_constant", {CONST_DOUBLE}}, \
{"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
{"lwa_operand", {SUBREG, MEM, REG}}, \
{"volatile_mem_operand", {MEM}}, \
{"offsettable_mem_operand", {MEM}}, \
{"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
{"add_operand", {SUBREG, REG, CONST_INT}}, \
{"non_add_cint_operand", {CONST_INT}}, \
{"and_operand", {SUBREG, REG, CONST_INT}}, \
{"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"logical_operand", {SUBREG, REG, CONST_INT}}, \
{"non_logical_cint_operand", {CONST_INT}}, \
{"mask_operand", {CONST_INT}}, \
{"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"count_register_operand", {REG}}, \
{"vector_register_operand", {REG}}, \
{"any_operand", {SUBREG, MEM, REG, CONST_INT, SYMBOL_REF, \
LABEL_REF, CONST_DOUBLE, PARALLEL}}, \
{"fpmem_operand", {REG}}, \
{"call_operand", {SYMBOL_REF, REG}}, \
{"current_file_function_operand", {SYMBOL_REF}}, \
{"input_operand", {SUBREG, MEM, REG, CONST_INT, \
CONST_DOUBLE, SYMBOL_REF}}, \
{"load_multiple_operation", {PARALLEL}}, \
{"store_multiple_operation", {PARALLEL}}, \
{"equality_operator", {EQ, NE}}, \
{"vector_comparison_operator", {EQ, LT}}, \
{"branch_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, \
{"scc_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, \
{"trap_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, \
{"shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT}},
#define ISSUE_RATE get_issue_rate ()
extern int flag_pic;
extern int optimize;
extern int flag_expensive_optimizations;
extern int frame_pointer_needed;
enum {VRSAVE_OFF, VRSAVE_NORMAL, VRSAVE_ALLON};
extern int current_vrsave_save_type,
standard_vrsave_save_type;
extern struct rtx_def *rs6000_eh_epilog_ret_addr,
*rs6000_eh_epilog_sp_offs;
extern char *choose_vec_easy ();
extern void optimization_options ();
extern void output_options ();
extern void rs6000_override_options ();
extern void rs6000_file_start ();
extern struct rtx_def *rs6000_float_const ();
extern struct rtx_def *rs6000_got_register ();
extern struct rtx_def *find_addr_reg();
extern int direct_return ();
extern int get_issue_rate ();
extern int any_operand ();
extern int zero_m1_operand ();
extern int short_cint_operand ();
extern int u_short_cint_operand ();
extern int non_short_cint_operand ();
extern int gpc_reg_operand ();
extern int cc_reg_operand ();
extern int cc_reg_not_cr0_operand ();
extern int reg_or_short_operand ();
extern int reg_or_neg_short_operand ();
extern int reg_or_u_short_operand ();
extern int reg_or_cint_operand ();
extern int got_operand ();
extern int got_no_const_operand ();
extern int num_insns_constant ();
extern int easy_fp_constant ();
extern int easy_vector_constant ();
extern int volatile_mem_operand ();
extern int offsettable_mem_operand ();
extern int mem_or_easy_const_operand ();
extern int add_operand ();
extern int non_add_cint_operand ();
extern int non_logical_cint_operand ();
extern int logical_operand ();
extern int mask_operand ();
extern int mask64_operand ();
extern int and64_operand ();
extern int and_operand ();
extern int count_register_operand ();
extern int vector_register_operand ();
extern int fpmem_operand ();
extern int reg_or_mem_operand ();
extern int lwa_operand ();
extern int call_operand ();
extern int current_file_function_operand ();
extern int input_operand ();
extern int small_data_operand ();
extern void init_cumulative_args ();
extern union tree_node *rearrange_arg_list ();
extern void function_arg_advance ();
extern int function_arg_boundary ();
extern struct rtx_def *function_arg ();
extern int function_arg_partial_nregs ();
extern int function_arg_pass_by_reference ();
extern void setup_incoming_varargs ();
extern struct rtx_def *expand_builtin_saveregs ();
extern struct rtx_def *rs6000_stack_temp ();
extern int expand_block_move ();
extern int load_multiple_operation ();
extern int store_multiple_operation ();
extern int equality_operator ();
extern int vector_comparison_operator ();
extern int branch_comparison_operator ();
extern int scc_comparison_operator ();
extern int trap_comparison_operator ();
extern int includes_lshift_p ();
extern int includes_rshift_p ();
extern int registers_ok_for_quad_peep ();
extern int addrs_ok_for_quad_peep ();
extern enum reg_class secondary_reload_class ();
extern int ccr_bit ();
extern void rs6000_finalize_pic ();
extern void rs6000_reorg ();
extern void rs6000_save_machine_status ();
extern void rs6000_restore_machine_status ();
extern void rs6000_init_expanders ();
extern void print_operand ();
extern void print_operand_address ();
extern int first_reg_to_save ();
extern int first_fp_reg_to_save ();
extern int first_vector_reg_to_save ();
extern int rs6000_makes_calls ();
extern rs6000_stack_t *rs6000_stack_info ();
extern void output_prolog ();
extern void output_epilog ();
extern void output_mi_thunk ();
extern void output_toc ();
extern void output_ascii ();
extern void rs6000_gen_section_name ();
extern void output_function_profiler ();
extern int rs6000_adjust_cost ();
extern int rs6000_adjust_priority ();
extern void rs6000_trampoline_template ();
extern int rs6000_trampoline_size ();
extern void rs6000_initialize_trampoline ();
extern void rs6000_output_load_toc_table ();
extern int rs6000_comp_type_attributes ();
extern int rs6000_valid_decl_attribute_p ();
extern int rs6000_valid_type_attribute_p ();
extern void rs6000_set_default_type_attributes ();
extern struct rtx_def *rs6000_dll_import_ref ();
extern struct rtx_def *rs6000_longcall_ref ();
extern int function_arg_padding ();
extern void toc_section ();
extern void private_data_section ();
extern void rs6000_fatal_bad_address ();
extern void init_target_intrinsic ();
#define INIT_TARGET_INTRINSIC(ENDLINK) \
init_target_intrinsic(ENDLINK, flag_altivec)
extern union tree_node *select_target_overloaded_intrinsic ();
#define SELECT_TARGET_OVERLOADED_INTRINSIC(FUNCTION, PARAMS) \
select_target_overloaded_intrinsic(FUNCTION, PARAMS)
extern struct rtx_def *expand_target_intrinsic ();
#define EXPAND_TARGET_INTRINSIC(FNDECL, TARGET, MODE, ARGLIST) \
expand_target_intrinsic(FNDECL, TARGET, MODE, ARGLIST)
#define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_TOC && TARGET_MINIMAL_TOC)