#ifndef __SYSDEP_LOCKS_H__
#define __SYSDEP_LOCKS_H__
typedef size_t obj_addr_t;
inline static bool
compare_and_swap(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
int ret;
__asm__ __volatile__ (
"0: lwarx %0,0,%1 ;"
" xor. %0,%3,%0;"
" bne 1f;"
" stwcx. %2,0,%1;"
" bne- 0b;"
"1: "
: "=&r"(ret)
: "r"(addr), "r"(new_val), "r"(old)
: "cr0", "memory");
__asm__ __volatile__ ("isync" : : : "memory");
return ret == 0;
}
inline static void
release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
{
__asm__ __volatile__ ("sync" : : : "memory");
*(addr) = new_val;
}
inline static bool
compare_and_swap_release(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
int ret;
__asm__ __volatile__ ("sync" : : : "memory");
__asm__ __volatile__ (
"0: lwarx %0,0,%1 ;"
" xor. %0,%3,%0;"
" bne 1f;"
" stwcx. %2,0,%1;"
" bne- 0b;"
"1: "
: "=&r"(ret)
: "r"(addr), "r"(new_val), "r"(old)
: "cr0", "memory");
return ret == 0;
}
inline static void
read_barrier()
{
__asm__ __volatile__ ("isync" : : : "memory");
}
inline static void
write_barrier()
{
__asm__ __volatile__ ("sync" : : : "memory");
}
#endif