#ifndef __SYSDEP_LOCKS_H__
#define __SYSDEP_LOCKS_H__
typedef unsigned obj_addr_t __attribute__((__mode__(__pointer__)));
inline static bool
compare_and_swap(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
long result;
__asm__ __volatile__(".set\tpush\n\t"
".set\tnoreorder\n\t"
".set\tnomacro\n\t"
"1:\n\t"
#if _MIPS_SIM == _ABIO32
".set\tmips2\n\t"
#endif
"ll\t%[result],0(%[addr])\n\t"
"bne\t%[result],%[old],2f\n\t"
"move\t%[result],$0\n\t" "move\t%[result],%[new_val]\n\t"
"sc\t%[result],0(%[addr])\n\t"
"beq\t%[result],$0,1b\n\t"
"nop\n\t" "2:\n\t"
".set\tpop"
: [result] "=&r" (result)
: [addr] "r" (addr), [new_val] "r" (new_val), [old] "r"(old)
: "memory");
return (bool) result;
}
inline static void
release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
{
__asm__ __volatile__(".set\tpush\n\t"
#if _MIPS_SIM == _ABIO32
".set\tmips2\n\t"
#endif
"sync\n\t"
".set\tpop" : : : "memory");
*(addr) = new_val;
}
inline static bool
compare_and_swap_release(volatile obj_addr_t *addr,
obj_addr_t old,
obj_addr_t new_val)
{
__asm__ __volatile__(".set\tpush\n\t"
#if _MIPS_SIM == _ABIO32
".set\tmips2\n\t"
#endif
"sync\n\t"
".set\tpop" : : : "memory");
return compare_and_swap(addr, old, new_val);
}
inline static void
read_barrier()
{
__asm__ __volatile__(".set\tpush\n\t"
#if _MIPS_SIM == _ABIO32
".set\tmips2\n\t"
#endif
"sync\n\t"
".set\tpop" : : : "memory");
}
inline static void
write_barrier()
{
__asm__ __volatile__(".set\tpush\n\t"
#if _MIPS_SIM == _ABIO32
".set\tmips2\n\t"
#endif
"sync\n\t"
".set\tpop" : : : "memory");
}
#endif // __SYSDEP_LOCKS_H__