#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "dis-asm.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
#include "mep-desc.h"
#include "mep-opc.h"
#include "opintl.h"
#define UNKNOWN_INSN_MSG _("*unknown*")
static void print_normal
(CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
static void print_address
(CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
static void print_keyword
(CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
static void print_insn_normal
(CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
static int print_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
static int default_print_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
static int read_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
unsigned long *);
#include "elf/mep.h"
#include "elf-bfd.h"
#define CGEN_VALIDATE_INSN_SUPPORTED
static void print_tpreg (CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int);
static void print_spreg (CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int);
static void
print_tpreg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, PTR dis_info,
CGEN_KEYWORD *table ATTRIBUTE_UNUSED, long val ATTRIBUTE_UNUSED,
unsigned int flags ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
(*info->fprintf_func) (info->stream, "$tp");
}
static void
print_spreg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, PTR dis_info,
CGEN_KEYWORD *table ATTRIBUTE_UNUSED, long val ATTRIBUTE_UNUSED,
unsigned int flags ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
(*info->fprintf_func) (info->stream, "$sp");
}
static void
print_fmax_cr (CGEN_CPU_DESC cd,
void *dis_info,
CGEN_KEYWORD *keyword_table ATTRIBUTE_UNUSED,
long value,
unsigned int attrs)
{
print_keyword (cd, dis_info, & mep_cgen_opval_h_cr_fmax, value, attrs);
}
static void
print_fmax_ccr (CGEN_CPU_DESC cd,
void *dis_info,
CGEN_KEYWORD *keyword_table ATTRIBUTE_UNUSED,
long value,
unsigned int attrs)
{
print_keyword (cd, dis_info, & mep_cgen_opval_h_ccr_fmax, value, attrs);
}
#undef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN mep_print_insn
static int
mep_print_vliw_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info,
bfd_byte *buf, int corelength, int copro1length,
int copro2length ATTRIBUTE_UNUSED)
{
int i;
int status = 0;
bfd_byte insnbuf[64];
if (corelength > 0)
{
int my_status = 0;
for (i = 0; i < corelength; i++ )
insnbuf[i] = buf[i];
cd->isas = & MEP_CORE_ISA;
my_status = print_insn (cd, pc, info, insnbuf, corelength);
if (my_status != corelength)
{
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
my_status = corelength;
}
status += my_status;
if (copro1length > 0)
(*info->fprintf_func) (info->stream, " + ");
}
if (copro1length > 0)
{
int my_status = 0;
for (i = corelength; i < corelength + copro1length; i++ )
insnbuf[i - corelength] = buf[i];
switch (copro1length)
{
case 0:
break;
case 2:
cd->isas = & MEP_COP16_ISA;
break;
case 4:
cd->isas = & MEP_COP32_ISA;
break;
case 6:
cd->isas = & MEP_COP48_ISA;
break;
case 8:
cd->isas = & MEP_COP64_ISA;
break;
default:
break;
}
my_status = print_insn (cd, pc, info, insnbuf, copro1length);
if (my_status != copro1length)
{
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
my_status = copro1length;
}
status += my_status;
}
#if 0
if (copro2length > 0)
{
int my_status = 0;
for (i = 0; i < 64 ; i++)
insnbuf[i] = 0;
for (i = corelength + copro1length; i < 64; i++)
insnbuf[i - (corelength + copro1length)] = buf[i];
switch (copro2length)
{
case 2:
cd->isas = 1 << ISA_EXT_COP1_16;
break;
case 4:
cd->isas = 1 << ISA_EXT_COP1_32;
break;
case 6:
cd->isas = 1 << ISA_EXT_COP1_48;
break;
case 8:
cd->isas = 1 << ISA_EXT_COP1_64;
break;
default:
break;
}
my_status = print_insn (cd, pc, info, insnbuf, copro2length);
if (my_status != copro2length)
{
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
my_status = copro2length;
}
status += my_status;
}
#endif
if ((!MEP_VLIW64 && (status != 4)) || (MEP_VLIW64 && (status != 8)))
return -1;
else
return status;
}
static int
mep_examine_vliw32_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
{
int status;
int buflength;
int corebuflength;
int cop1buflength;
int cop2buflength;
bfd_byte buf[CGEN_MAX_INSN_SIZE];
char indicator16[1];
char indicatorcop32[2];
cop2buflength = 0;
buflength = 4;
status = (*info->read_memory_func) (pc, buf, buflength, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
if (info->endian == BFD_ENDIAN_BIG)
{
indicator16[0] = buf[0];
indicatorcop32[0] = buf[0];
indicatorcop32[1] = buf[1];
}
else
{
indicator16[0] = buf[1];
indicatorcop32[0] = buf[1];
indicatorcop32[1] = buf[0];
}
if ((indicator16[0] & 0x80) && (indicator16[0] & 0x40))
{
if ((indicatorcop32[0] & 0xf0) == 0xf0 && (indicatorcop32[1] & 0x07) == 0x07)
{
corebuflength = 0;
cop1buflength = 4;
}
else
{
corebuflength = 4;
cop1buflength = 0;
}
}
else
{
corebuflength = 2;
cop1buflength = 2;
}
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
return status;
}
static int
mep_examine_vliw64_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
{
int status;
int buflength;
int corebuflength;
int cop1buflength;
int cop2buflength;
bfd_byte buf[CGEN_MAX_INSN_SIZE];
char indicator16[1];
char indicator64[4];
cop2buflength = 0;
buflength = 8;
status = (*info->read_memory_func) (pc, buf, buflength, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
if (info->endian == BFD_ENDIAN_BIG)
{
indicator16[0] = buf[0];
indicator64[0] = buf[0];
indicator64[1] = buf[1];
indicator64[2] = buf[2];
indicator64[3] = buf[3];
}
else
{
indicator16[0] = buf[1];
indicator64[0] = buf[1];
indicator64[1] = buf[0];
indicator64[2] = buf[3];
indicator64[3] = buf[2];
}
if ((indicator16[0] & 0x80) && (indicator16[0] & 0x40))
{
if ((indicator64[0] & 0xf0) == 0xf0 && (indicator64[1] & 0x07) == 0x07
&& ((indicator64[2] & 0xfe) != 0xf0 || (indicator64[3] & 0xf4) != 0))
{
corebuflength = 0;
cop1buflength = 8;
}
else
{
corebuflength = 4;
cop1buflength = 4;
}
}
else
{
corebuflength = 2;
cop1buflength = 6;
}
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
return status;
}
static int
mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
{
int status;
if (info->section && info->section->owner)
{
bfd *abfd = info->section->owner;
mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK;
}
if (info->section)
{
if (info->section->flags & SEC_MEP_VLIW)
{
if (MEP_VLIW64)
status = mep_examine_vliw64_insns (cd, pc, info);
else
status = mep_examine_vliw32_insns (cd, pc, info);
}
else
{
cd->isas = & MEP_CORE_ISA;
status = default_print_insn (cd, pc, info);
}
}
else
{
status = default_print_insn (cd, pc, info);
}
return status;
}
void mep_cgen_print_operand
(CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
void
mep_cgen_print_operand (CGEN_CPU_DESC cd,
int opindex,
void * xinfo,
CGEN_FIELDS *fields,
void const *attrs ATTRIBUTE_UNUSED,
bfd_vma pc,
int length)
{
disassemble_info *info = (disassemble_info *) xinfo;
switch (opindex)
{
case MEP_OPERAND_ADDR24A4 :
print_normal (cd, info, fields->f_24u8a4n, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_CALLNUM :
print_normal (cd, info, fields->f_callnum, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_CCCC :
print_normal (cd, info, fields->f_rm, 0, pc, length);
break;
case MEP_OPERAND_CCRN :
print_keyword (cd, info, & mep_cgen_opval_h_ccr, fields->f_ccrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_CDISP8 :
print_normal (cd, info, fields->f_8s24, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_CDISP8A2 :
print_normal (cd, info, fields->f_8s24a2, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_CDISP8A4 :
print_normal (cd, info, fields->f_8s24a4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_CDISP8A8 :
print_normal (cd, info, fields->f_8s24a8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_CIMM4 :
print_normal (cd, info, fields->f_rn, 0, pc, length);
break;
case MEP_OPERAND_CIMM5 :
print_normal (cd, info, fields->f_5u24, 0, pc, length);
break;
case MEP_OPERAND_CODE16 :
print_normal (cd, info, fields->f_16u16, 0, pc, length);
break;
case MEP_OPERAND_CODE24 :
print_normal (cd, info, fields->f_24u4n, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_CP_FLAG :
print_keyword (cd, info, & mep_cgen_opval_h_ccr, 0, 0);
break;
case MEP_OPERAND_CRN :
print_keyword (cd, info, & mep_cgen_opval_h_cr, fields->f_crn, 0);
break;
case MEP_OPERAND_CRN64 :
print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_crn, 0);
break;
case MEP_OPERAND_CRNX :
print_keyword (cd, info, & mep_cgen_opval_h_cr, fields->f_crnx, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_CRNX64 :
print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_crnx, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_CSRN :
print_keyword (cd, info, & mep_cgen_opval_h_csr, fields->f_csrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_CSRN_IDX :
print_normal (cd, info, fields->f_csrn, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_DBG :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_DEPC :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_EPC :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_EXC :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_FMAX_CCRN :
print_fmax_ccr (cd, info, & mep_cgen_opval_h_ccr, fields->f_fmax_4_4, 0);
break;
case MEP_OPERAND_FMAX_FRD :
print_fmax_cr (cd, info, & mep_cgen_opval_h_cr, fields->f_fmax_frd, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_FMAX_FRD_INT :
print_fmax_cr (cd, info, & mep_cgen_opval_h_cr, fields->f_fmax_frd, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_FMAX_FRM :
print_fmax_cr (cd, info, & mep_cgen_opval_h_cr, fields->f_fmax_frm, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_FMAX_FRN :
print_fmax_cr (cd, info, & mep_cgen_opval_h_cr, fields->f_fmax_frn, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_FMAX_FRN_INT :
print_fmax_cr (cd, info, & mep_cgen_opval_h_cr, fields->f_fmax_frn, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case MEP_OPERAND_FMAX_RM :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_fmax_rm, 0);
break;
case MEP_OPERAND_HI :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_LO :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_LP :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_MB0 :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_MB1 :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_ME0 :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_ME1 :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_NPC :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_OPT :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_PCABS24A2 :
print_address (cd, info, fields->f_24u5a2n, 0|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_PCREL12A2 :
print_address (cd, info, fields->f_12s4a2, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case MEP_OPERAND_PCREL17A2 :
print_address (cd, info, fields->f_17s16a2, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case MEP_OPERAND_PCREL24A2 :
print_address (cd, info, fields->f_24s5a2n, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_PCREL8A2 :
print_address (cd, info, fields->f_8s8a2, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case MEP_OPERAND_PSW :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_R0 :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_R1 :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_RL :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rl, 0);
break;
case MEP_OPERAND_RM :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rm, 0);
break;
case MEP_OPERAND_RMA :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rm, 0);
break;
case MEP_OPERAND_RN :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RN3 :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3C :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3L :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3S :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3UC :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3UL :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RN3US :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn3, 0);
break;
case MEP_OPERAND_RNC :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RNL :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RNS :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RNUC :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RNUL :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_RNUS :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_rn, 0);
break;
case MEP_OPERAND_SAR :
print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
break;
case MEP_OPERAND_SDISP16 :
print_normal (cd, info, fields->f_16s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_SIMM16 :
print_normal (cd, info, fields->f_16s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_SIMM6 :
print_normal (cd, info, fields->f_6s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_SIMM8 :
print_normal (cd, info, fields->f_8s8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW), pc, length);
break;
case MEP_OPERAND_SP :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_SPR :
print_spreg (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_TP :
print_keyword (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_TPR :
print_tpreg (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
break;
case MEP_OPERAND_UDISP2 :
print_normal (cd, info, fields->f_2u6, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case MEP_OPERAND_UDISP7 :
print_normal (cd, info, fields->f_7u9, 0, pc, length);
break;
case MEP_OPERAND_UDISP7A2 :
print_normal (cd, info, fields->f_7u9a2, 0, pc, length);
break;
case MEP_OPERAND_UDISP7A4 :
print_normal (cd, info, fields->f_7u9a4, 0, pc, length);
break;
case MEP_OPERAND_UIMM16 :
print_normal (cd, info, fields->f_16u16, 0, pc, length);
break;
case MEP_OPERAND_UIMM2 :
print_normal (cd, info, fields->f_2u10, 0, pc, length);
break;
case MEP_OPERAND_UIMM24 :
print_normal (cd, info, fields->f_24u8n, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case MEP_OPERAND_UIMM3 :
print_normal (cd, info, fields->f_3u5, 0, pc, length);
break;
case MEP_OPERAND_UIMM4 :
print_normal (cd, info, fields->f_4u8, 0, pc, length);
break;
case MEP_OPERAND_UIMM5 :
print_normal (cd, info, fields->f_5u8, 0, pc, length);
break;
case MEP_OPERAND_UIMM7A4 :
print_normal (cd, info, fields->f_7u9a4, 0, pc, length);
break;
case MEP_OPERAND_ZERO :
print_normal (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
default :
fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
opindex);
abort ();
}
}
cgen_print_fn * const mep_cgen_print_handlers[] =
{
print_insn_normal,
};
void
mep_cgen_init_dis (CGEN_CPU_DESC cd)
{
mep_cgen_init_opcode_table (cd);
mep_cgen_init_ibld_table (cd);
cd->print_handlers = & mep_cgen_print_handlers[0];
cd->print_operand = mep_cgen_print_operand;
}
static void
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
long value,
unsigned int attrs,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
#ifdef CGEN_PRINT_NORMAL
CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
#endif
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
;
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", value);
else
(*info->fprintf_func) (info->stream, "0x%lx", value);
}
static void
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
bfd_vma value,
unsigned int attrs,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
#ifdef CGEN_PRINT_ADDRESS
CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
#endif
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
;
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", (long) value);
else
(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
}
static void
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
CGEN_KEYWORD *keyword_table,
long value,
unsigned int attrs ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_KEYWORD_ENTRY *ke;
ke = cgen_keyword_lookup_value (keyword_table, value);
if (ke != NULL)
(*info->fprintf_func) (info->stream, "%s", ke->name);
else
(*info->fprintf_func) (info->stream, "???");
}
static void
print_insn_normal (CGEN_CPU_DESC cd,
void *dis_info,
const CGEN_INSN *insn,
CGEN_FIELDS *fields,
bfd_vma pc,
int length)
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_SYNTAX_CHAR_TYPE *syn;
CGEN_INIT_PRINT (cd);
for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
{
if (CGEN_SYNTAX_MNEMONIC_P (*syn))
{
(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
continue;
}
if (CGEN_SYNTAX_CHAR_P (*syn))
{
(*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
continue;
}
mep_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
fields, CGEN_INSN_ATTRS (insn), pc, length);
}
}
static int
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
bfd_vma pc,
disassemble_info *info,
bfd_byte *buf,
int buflen,
CGEN_EXTRACT_INFO *ex_info,
unsigned long *insn_value)
{
int status = (*info->read_memory_func) (pc, buf, buflen, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
ex_info->dis_info = info;
ex_info->valid = (1 << buflen) - 1;
ex_info->insn_bytes = buf;
*insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
return 0;
}
static int
print_insn (CGEN_CPU_DESC cd,
bfd_vma pc,
disassemble_info *info,
bfd_byte *buf,
unsigned int buflen)
{
CGEN_INSN_INT insn_value;
const CGEN_INSN_LIST *insn_list;
CGEN_EXTRACT_INFO ex_info;
int basesize;
basesize = cd->base_insn_bitsize < buflen * 8 ?
cd->base_insn_bitsize : buflen * 8;
insn_value = cgen_get_insn_value (cd, buf, basesize);
ex_info.valid = (1 << buflen) - 1;
ex_info.dis_info = info;
ex_info.insn_bytes = buf;
insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
while (insn_list != NULL)
{
const CGEN_INSN *insn = insn_list->insn;
CGEN_FIELDS fields;
int length;
unsigned long insn_value_cropped;
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
if (! mep_cgen_insn_supported (cd, insn))
{
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
continue;
}
#endif
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
info->endian == BFD_ENDIAN_BIG);
else
insn_value_cropped = insn_value;
if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
== CGEN_INSN_BASE_VALUE (insn))
{
if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
{
unsigned long full_insn_value;
int rc = read_insn (cd, pc, info, buf,
CGEN_INSN_BITSIZE (insn) / 8,
& ex_info, & full_insn_value);
if (rc != 0)
return rc;
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, full_insn_value, &fields, pc);
}
else
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
if (length < 0)
return length;
if (length > 0)
{
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
return length / 8;
}
}
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
}
return 0;
}
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
#endif
static int
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
{
bfd_byte buf[CGEN_MAX_INSN_SIZE];
int buflen;
int status;
buflen = cd->base_insn_bitsize / 8;
status = (*info->read_memory_func) (pc, buf, buflen, info);
if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
{
buflen = cd->min_insn_bitsize / 8;
status = (*info->read_memory_func) (pc, buf, buflen, info);
}
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
return -1;
}
return print_insn (cd, pc, info, buf, buflen);
}
typedef struct cpu_desc_list
{
struct cpu_desc_list *next;
CGEN_BITSET *isa;
int mach;
int endian;
CGEN_CPU_DESC cd;
} cpu_desc_list;
int
print_insn_mep (bfd_vma pc, disassemble_info *info)
{
static cpu_desc_list *cd_list = 0;
cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
int length;
CGEN_BITSET *isa;
int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
enum bfd_architecture arch;
#ifndef CGEN_BFD_ARCH
#define CGEN_BFD_ARCH bfd_arch_mep
#endif
arch = info->arch;
if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH;
#ifdef CGEN_COMPUTE_MACH
mach = CGEN_COMPUTE_MACH (info);
#else
mach = info->mach;
#endif
#ifdef CGEN_COMPUTE_ISA
{
static CGEN_BITSET *permanent_isa;
if (!permanent_isa)
permanent_isa = cgen_bitset_create (MAX_ISAS);
isa = permanent_isa;
cgen_bitset_clear (isa);
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
isa = info->insn_sets;
#endif
if (cd
&& (cgen_bitset_compare (isa, prev_isa) != 0
|| mach != prev_mach
|| endian != prev_endian))
{
cd = 0;
for (cl = cd_list; cl; cl = cl->next)
{
if (cgen_bitset_compare (cl->isa, isa) == 0 &&
cl->mach == mach &&
cl->endian == endian)
{
cd = cl->cd;
prev_isa = cd->isas;
break;
}
}
}
if (! cd)
{
const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
const char *mach_name;
if (!arch_type)
abort ();
mach_name = arch_type->printable_name;
prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
cd = mep_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, prev_endian,
CGEN_CPU_OPEN_END);
if (!cd)
abort ();
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
cl->isa = prev_isa;
cl->mach = mach;
cl->endian = endian;
cl->next = cd_list;
cd_list = cl;
mep_cgen_init_dis (cd);
}
length = CGEN_PRINT_INSN (cd, pc, info);
if (length > 0)
return length;
if (length < 0)
return -1;
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
return cd->default_insn_bitsize / 8;
}