//===- MipsInstrInfo.h - Mips Instruction Information -----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the Mips implementation of the TargetInstrInfo class. // //===----------------------------------------------------------------------===// #ifndef MIPSINSTRUCTIONINFO_H #define MIPSINSTRUCTIONINFO_H #include "Mips.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Target/TargetInstrInfo.h" #include "MipsRegisterInfo.h" #define GET_INSTRINFO_HEADER #include "MipsGenInstrInfo.inc" namespace llvm { namespace Mips { /// GetOppositeBranchOpc - Return the inverse of the specified /// opcode, e.g. turning BEQ to BNE. unsigned GetOppositeBranchOpc(unsigned Opc); } /// MipsII - This namespace holds all of the target specific flags that /// instruction info tracks. /// namespace MipsII { /// Target Operand Flag enum. enum TOF { //===------------------------------------------------------------------===// // Mips Specific MachineOperand flags. MO_NO_FLAG, /// MO_GOT - Represents the offset into the global offset table at which /// the address the relocation entry symbol resides during execution. MO_GOT, /// MO_GOT_CALL - Represents the offset into the global offset table at /// which the address of a call site relocation entry symbol resides /// during execution. This is different from the above since this flag /// can only be present in call instructions. MO_GOT_CALL, /// MO_GPREL - Represents the offset from the current gp value to be used /// for the relocatable object file being produced. MO_GPREL, /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol /// address. MO_ABS_HI, MO_ABS_LO, /// MO_TLSGD - Represents the offset into the global offset table at which // the module ID and TSL block offset reside during execution (General // Dynamic TLS). MO_TLSGD, /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial // Exec TLS). MO_GOTTPREL, /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from // the thread pointer (Local Exec TLS). MO_TPREL_HI, MO_TPREL_LO, // N32/64 Flags. MO_GPOFF_HI, MO_GPOFF_LO, MO_GOT_DISP, MO_GOT_PAGE, MO_GOT_OFST }; enum { //===------------------------------------------------------------------===// // Instruction encodings. These are the standard/most common forms for // Mips instructions. // // Pseudo - This represents an instruction that is a pseudo instruction // or one that has not been implemented yet. It is illegal to code generate // it, but tolerated for intermediate implementation stages. Pseudo = 0, /// FrmR - This form is for instructions of the format R. FrmR = 1, /// FrmI - This form is for instructions of the format I. FrmI = 2, /// FrmJ - This form is for instructions of the format J. FrmJ = 3, /// FrmFR - This form is for instructions of the format FR. FrmFR = 4, /// FrmFI - This form is for instructions of the format FI. FrmFI = 5, /// FrmOther - This form is for instructions that have no specific format. FrmOther = 6, FormMask = 15 }; } class MipsInstrInfo : public MipsGenInstrInfo { MipsTargetMachine &TM; bool IsN64; const MipsRegisterInfo RI; public: explicit MipsInstrInfo(MipsTargetMachine &TM); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). /// virtual const MipsRegisterInfo &getRegisterInfo() const; /// isLoadFromStackSlot - If the specified machine instruction is a direct /// load from a stack slot, return the virtual or physical register number of /// the destination along with the FrameIndex of the loaded stack slot. If /// not, return 0. This predicate must return 0 if the instruction has /// any side effects other than loading from the stack slot. virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; /// isStoreToStackSlot - If the specified machine instruction is a direct /// store to a stack slot, return the virtual or physical register number of /// the source reg along with the FrameIndex of the loaded stack slot. If /// not, return 0. This predicate must return 0 if the instruction has /// any side effects other than storing to the stack slot. virtual unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const; /// Branch Analysis virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; private: void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, const SmallVectorImpl<MachineOperand>& Cond) const; public: virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const; virtual void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const; virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const; virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const; virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF, int FrameIx, uint64_t Offset, const MDNode *MDPtr, DebugLoc DL) const; virtual bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; /// Insert nop instruction when hazard condition is found virtual void insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const; /// getGlobalBaseReg - Return a virtual register initialized with the /// the global base register value. Output instructions required to /// initialize the register in the function entry block, if necessary. /// unsigned getGlobalBaseReg(MachineFunction *MF) const; }; } #endif