#ifndef __M_DEBUG_UTIL_H__
#define __M_DEBUG_UTIL_H__
#ifdef DEBUG
#if defined(__GNUC__) && \
((defined(__i386__) && defined(USE_X86_ASM)) || \
(defined(__sparc__) && defined(USE_SPARC_ASM)))
#define RUN_DEBUG_BENCHMARK
#endif
#define TEST_COUNT 128
#define REQUIRED_PRECISION 10
#define MAX_PRECISION 24
#ifdef RUN_DEBUG_BENCHMARK
extern long counter_overhead;
extern char *mesa_profile;
#if defined(__i386__)
#if 1
#define INIT_COUNTER() \
do { \
int cycle_i; \
counter_overhead = LONG_MAX; \
for ( cycle_i = 0 ; cycle_i < 8 ; cycle_i++ ) { \
long cycle_tmp1 = 0, cycle_tmp2 = 0; \
__asm__ __volatile__ ( "push %%ebx \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"rdtsc \n" \
"mov %%eax, %0 \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"pop %%ebx \n" \
"push %%ebx \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"rdtsc \n" \
"mov %%eax, %1 \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"pop %%ebx \n" \
: "=m" (cycle_tmp1), "=m" (cycle_tmp2) \
: : "eax", "ecx", "edx" ); \
if ( counter_overhead > (cycle_tmp2 - cycle_tmp1) ) { \
counter_overhead = cycle_tmp2 - cycle_tmp1; \
} \
} \
} while (0)
#define BEGIN_RACE(x) \
x = LONG_MAX; \
for ( cycle_i = 0 ; cycle_i < 10 ; cycle_i++ ) { \
long cycle_tmp1 = 0, cycle_tmp2 = 0; \
__asm__ __volatile__ ( "push %%ebx \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"rdtsc \n" \
"mov %%eax, %0 \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"pop %%ebx \n" \
: "=m" (cycle_tmp1) \
: : "eax", "ecx", "edx" );
#define END_RACE(x) \
__asm__ __volatile__ ( "push %%ebx \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"rdtsc \n" \
"mov %%eax, %0 \n" \
"xor %%eax, %%eax \n" \
"cpuid \n" \
"pop %%ebx \n" \
: "=m" (cycle_tmp2) \
: : "eax", "ecx", "edx" ); \
if ( x > (cycle_tmp2 - cycle_tmp1) ) { \
x = cycle_tmp2 - cycle_tmp1; \
} \
} \
x -= counter_overhead;
#else
#define INIT_COUNTER(x) \
do { \
int cycle_i; \
x = LONG_MAX; \
for ( cycle_i = 0 ; cycle_i < 32 ; cycle_i++ ) { \
long cycle_tmp1, cycle_tmp2, dummy; \
__asm__ ( "mov %%eax, %0" : "=a" (cycle_tmp1) ); \
__asm__ ( "mov %%eax, %0" : "=a" (cycle_tmp2) ); \
__asm__ ( "cdq" ); \
__asm__ ( "cdq" ); \
__asm__ ( "rdtsc" : "=a" (cycle_tmp1), "=d" (dummy) ); \
__asm__ ( "cdq" ); \
__asm__ ( "cdq" ); \
__asm__ ( "rdtsc" : "=a" (cycle_tmp2), "=d" (dummy) ); \
if ( x > (cycle_tmp2 - cycle_tmp1) ) \
x = cycle_tmp2 - cycle_tmp1; \
} \
} while (0)
#define BEGIN_RACE(x) \
x = LONG_MAX; \
for ( cycle_i = 0 ; cycle_i < 16 ; cycle_i++ ) { \
long cycle_tmp1, cycle_tmp2, dummy; \
__asm__ ( "mov %%eax, %0" : "=a" (cycle_tmp1) ); \
__asm__ ( "mov %%eax, %0" : "=a" (cycle_tmp2) ); \
__asm__ ( "cdq" ); \
__asm__ ( "cdq" ); \
__asm__ ( "rdtsc" : "=a" (cycle_tmp1), "=d" (dummy) );
#define END_RACE(x) \
__asm__ ( "cdq" ); \
__asm__ ( "cdq" ); \
__asm__ ( "rdtsc" : "=a" (cycle_tmp2), "=d" (dummy) ); \
if ( x > (cycle_tmp2 - cycle_tmp1) ) \
x = cycle_tmp2 - cycle_tmp1; \
} \
x -= counter_overhead;
#endif
#elif defined(__sparc__)
#define INIT_COUNTER() \
do { counter_overhead = 5; } while(0)
#define BEGIN_RACE(x) \
x = LONG_MAX; \
for (cycle_i = 0; cycle_i <10; cycle_i++) { \
register long cycle_tmp1 asm("l0"); \
register long cycle_tmp2 asm("l1"); \
\
__asm__ __volatile__ (".word 0xa1410000" : "=r" (cycle_tmp1));
#define END_RACE(x) \
\
__asm__ __volatile__ (".word 0xa3410000" : "=r" (cycle_tmp2)); \
if (x > (cycle_tmp2-cycle_tmp1)) x = cycle_tmp2 - cycle_tmp1; \
} \
x -= counter_overhead;
#else
#error Your processor is not supported for RUN_XFORM_BENCHMARK
#endif
#else
#define BEGIN_RACE(x)
#define END_RACE(x)
#endif
static GLfloat rnd( void )
{
GLfloat f = (GLfloat)rand() / (GLfloat)RAND_MAX;
GLfloat gran = (GLfloat)(1 << 13);
f = (GLfloat)(GLint)(f * gran) / gran;
return f * 2.0 - 1.0;
}
static int significand_match( GLfloat a, GLfloat b )
{
GLfloat d = a - b;
int a_ex, b_ex, d_ex;
if ( d == 0.0F ) {
return MAX_PRECISION;
}
if ( a == 0.0F || b == 0.0F ) {
return 0;
}
frexp( a, &a_ex );
frexp( b, &b_ex );
frexp( d, &d_ex );
if ( a_ex < b_ex ) {
return a_ex - d_ex;
} else {
return b_ex - d_ex;
}
}
enum { NIL = 0, ONE = 1, NEG = -1, VAR = 2 };
#if defined(__GNUC__)
# define ALIGN16 __attribute__ ((aligned (16)))
#elif defined(__MSC__)
# define ALIGN16 __declspec(align(16))
#else
# warning "ALIGN16 will not 16-byte align!\n"
# define ALIGN16
#endif
#endif
#endif